Panel-Level Metal Wall Grids for IC Thermal Dissipation
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Solution Overview
Problem
As the trend in integrated circuit development aims to increase integration density by shrinking package size, there is a need to improve thermal dissipation performance while maintaining effective electrical connections and signal communication, which existing packaging structures struggle to achieve efficiently.
Innovation Solution
A panel-shaped metal wall grids array is introduced, where an array of metal wall grids with continuous and closed metal walls is formed into a panel, connected through metal connecting portions, and manufactured using a method involving electroplating and masking processes on a carrier board, allowing for enhanced thermal conductivity and EMI protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If package size is shrunk to increase integration density, then integration density is improved, but thermal dissipation performance deteriorates
Solution Approach 1:
The patent transitions from traditional two-dimensional planar packaging to three-dimensional vertical packaging by introducing metal wall grids that extend upward from the substrate. This vertical dimension allows multiple integrated circuits to be stacked and interconnected in the Z-direction, achieving high integration density while maintaining effective thermal pathways through the vertical metal structures that can conduct heat away from the stacked devices.
Solution Approach 2:
The metal wall grids serve as intermediary structures that simultaneously provide electrical interconnection between stacked integrated circuits and thermal conduction pathways. These metal walls act as mediators that transfer both signals and heat, resolving the contradiction by enabling dense integration while maintaining thermal dissipation through the dual-function metal structures.
2Quantity of substance
If package size is shrunk to increase integration density, then integration density is improved, but electromagnetic interference protection deteriorates
Solution Approach 1:
By extending metal structures vertically in the third dimension, the patent creates three-dimensional metal wall grids that form enclosed or semi-enclosed spaces around stacked integrated circuits. These vertical metal walls provide electromagnetic shielding in the vertical direction, protecting sensitive circuits from EMI while enabling high-density vertical stacking that would not be possible with traditional planar shielding approaches.
3Temperature
If complex metal wall grid structures are introduced to improve thermal dissipation and EMI protection, then thermal dissipation and EMI protection are improved, but manufacturing complexity increases
Solution Approach 1:
The manufacturing process is segmented into distinct sequential steps: forming a base metal layer, depositing insulating material, patterning and depositing additional metal layers to create the vertical wall grids. This segmentation of the manufacturing process into modular deposition and patterning steps makes the complex three-dimensional structure achievable through standard semiconductor fabrication techniques, reducing overall manufacturing complexity.
Solution Approach 2:
The patent replaces traditional mechanical or chemical etching methods with vapor-phase deposition processes to create the complex three-dimensional metal wall grid structures. This substitution of deposition-based manufacturing for etching-based manufacturing simplifies the process by building structures additively layer-by-layer rather than requiring complex subtractive patterning, reducing manufacturing complexity while achieving the desired thermal and EMI protection functions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively enhances thermal dissipation and electromagnetic interference (EMI) protection while maintaining the compact size, enabling improved heat management and electrical connectivity for integrated circuits.
Implementation Method 1
forming an electroplating mask layer on the conductive seed layer; patterning the electroplating mask layer to remove portions of the electroplating mask layer where metal walls of the metal wall grids array will be later formed; electroplating metal materials with the patterned electroplating mask layer as a mask to fill in the hollow groove grids array to form the panel-shaped metal wall grids array
Data Source
AI summary
A panel-shaped metal wall grids array for panel level IC packaging and associated manufacturing method. Each metal wall grid in the metal wall grids array has a continuous and closed metal wall of a predetermined wall height. The metal wall grids are connected to form a monolithic panel through a plurality of metal connecting portions. When the panel-shaped metal wall grids array is used for panel level IC packaging, at least one IC chip/IC die is disposed in each metal wall grid with a top surface of each IC chip/IC die facing downwards, and a panel-shaped metal layer matching with the panel-shaped wall grids array may be further formed on the entire back side of the panel-shaped metal wall grids array so that the panel-shaped metal layer is bonded to the metal wall of each metal wall grid.


