Panel Reference Line Layout for Accurate Pixel Defect Location

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Solution Overview

Problem

Array checkers struggle to accurately locate defects in small-sized pixels due to inaccuracies in determining the defect location, leading to incorrect repair of pixels.

Innovation Solution

Activate reference lines in the active area of a panel, generate an image, detect defect and reference line locations, determine an offset between the reference line and known locations, and compensate the defect location based on this offset to improve accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Difficulty of detecting and measuring

If array checkers are used to detect defects in small-sized pixels, then defect detection capability is provided, but measurement precision deteriorates due to inaccurate defect location determination

Engineering Contradiction:
Improvedefect detection capabilityVSAvoiddefect location accuracy
Core Design Contradiction:
Difficulty of detecting and measuringVSMeasurement precision

Solution Approach 1:

The patent introduces reference lines as intermediary elements with known positions that serve as mediators between the imaging system and the defect detection process. These reference lines enable the system to calculate and compensate for positioning errors, thereby improving measurement precision without sacrificing defect detection capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements a feedback mechanism where the detected position of reference lines is used to calculate offset values that compensate for imaging errors. This feedback loop allows the system to continuously correct positioning inaccuracies, resolving the contradiction between detection capability and measurement precision.

Inventive Principle:
Principle #23Feedback

2Shape

If pixel size is decreased to improve display resolution, then display quality improves, but manufacturing precision deteriorates due to increased difficulty in accurate defect location

Engineering Contradiction:
Improvepixel sizeVSAvoiddefect location accuracy
Core Design Contradiction:
ShapeVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by pre-positioning reference lines with known locations before defect detection occurs. This preliminary setup enables subsequent accurate measurement and compensation, allowing the system to maintain manufacturing precision even as pixel sizes decrease to improve display resolution.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the parameter approach by introducing reference line positions as known parameters that enable error compensation. This parameter change allows the system to account for positioning errors and maintain manufacturing precision despite reduced pixel sizes.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If array checkers detect defects without reference lines, then device complexity is reduced, but reliability deteriorates due to incorrect defect location reporting

Engineering Contradiction:
Improvepanel structure complexityVSAvoiddefect location reporting accuracy
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the panel by adding separate reference lines distinct from the pixel array. This segmentation allows the reference lines to independently provide positioning information, improving reliability without significantly increasing overall device complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The reference lines serve as intermediary elements that bridge the gap between the imaging system and the pixel array. These intermediaries provide reliable positioning data without requiring fundamental changes to the core array structure, thus maintaining low device complexity while improving reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12561782B2Panel design to improve accurate defect location report
Publication Date: 2026.02.24 KLA CORP
  • US12561782B2 patent drawing
  • US12561782B2 patent drawing
  • US12561782B2 patent drawing

AI summary

An array checker (AC) is described. The array checker may include software configured to implement a method. By implementing the method, the array checker may detect a location of a defect and then compensate for a shift in the defect. In particular, the method may include generating one or more reference lines in a panel. The reference lines may include a location which is known prior to generating an image of the panel. The array checker may then capture an image of the panel. The image may be captured by voltage imaging. The image may include the defect and the one or more reference lines. The method may then include calculating an offset of the reference line from the known location. The offset may then be applied to the defect location for compensating the shift in the defect.