Panel-Type UBM Fabrication via Electroless Plating

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Solution Overview

Problem

The existing methods for fabricating under bump metallurgy (UBM) structures on semiconductor chips are restricted by wafer size, leading to poor productivity and high processing costs due to complex and costly processes.

Innovation Solution

A method using electroless plating with a panel type process to form UBM structures directly on semiconductor chips, eliminating the need for patterned photoresistance layers and electroplating, thereby simplifying the process and reducing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If wafer size processing is used to form UBM structure and metal bump, then the process can be completed with conventional methods, but the output is restricted and productivity is poor

Engineering Contradiction:
ImproveoutputVSAvoidprocess complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the wafer into multiple semiconductor chips and processes them separately on an integrated carrier. Each chip is individually handled for UBM structure formation and bump creation, allowing parallel processing of multiple units simultaneously, thus increasing overall output while managing process complexity through modular operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from processing a single large wafer to processing multiple smaller chips arranged in a panel configuration on an integrated carrier. This dimensional reorganization allows simultaneous processing of multiple chips, effectively increasing productivity without proportionally increasing process complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If conventional electroplating and patterning processes are used to form UBM structure, then the structure can be precisely formed, but the fabrication cost is high

Engineering Contradiction:
Improvefabrication costVSAvoidUBM structure precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent replaces the conventional electroplating process with a chemical deposition method. The UBM structure is formed through chemical reactions and self-assembly processes rather than electrical current-driven metal deposition, reducing equipment complexity and fabrication costs while maintaining adequate structural precision for bump formation.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The UBM structure formation process utilizes self-aligned chemical deposition where the metal layers automatically form in the correct positions and configurations without requiring complex photolithography patterning steps. The chemical processes self-organize to create the desired UBM structure, reducing manufacturing precision requirements for alignment while maintaining functional integrity.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly increases productivity, reduces fabrication costs, and enhances efficiency by allowing mass processing of multiple chips on an integrated carrier with self-aligned UBM structures formed through electroless plating.

Implementation Method 1

an electroless plating process is executed to form an UBM structure on the metal electrode pad of the semiconductor chip

Methodology Applied
Scientific EffectElectroless plating: Chemical Bonding

Data Source

PatentUS10483232B2Method for fabricating bump structures on chips with panel type process
Publication Date: 2019.11.19 PHOENIX PIONEER TECH
  • US10483232B2 patent drawing
  • US10483232B2 patent drawing
  • US10483232B2 patent drawing

AI summary

A method for fabricating bump structures on chips with a panel type process is provided. First, a panel type substrate is provided. Semiconductor chips are fixed on the panel type substrate. Each semiconductor chip includes metal pads and a passivation layer exposing the metal pads. At least an electroless plating process is performed to form under bump metallurgy structures on the metal pads. The method simplifies the processes of forming electrical connections for semiconductor chips. The panel type process can effectively increase the yield, and reduce the manufacturing cost.