Parallel 2DEG Transistor Drive Circuit for Loss Reduction
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Solution Overview
Problem
Transistors used as electronic switches experience significant losses due to conduction and switching losses, which are dependent on the on-resistance and switching frequency, respectively, and current rating, leading to inefficiencies in energy usage.
Innovation Solution
An electronic circuit with a transistor arrangement comprising a first type transistor device and at least one second type transistor device, both with two-dimensional electron gas (2DEG) in the load path and a field plate, connected in parallel, where a drive circuit receives input and load signals to activate or deactivate the second type transistor device based on load parameters, optimizing the operation to reduce overall losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a single transistor device is used to handle high current loads, then the current rating is sufficient, but conduction losses increase due to higher on-resistance
Solution Approach 1:
The patent divides a single high-power transistor function into multiple parallel transistor devices (first type and second type). By segmenting the current handling across multiple devices with lower individual on-resistance, the total conduction losses are reduced while maintaining the required current rating. The drive circuit controls these segmented devices to share the load current effectively.
2Loss of energy
If multiple transistor devices are connected in parallel to reduce conduction losses, then energy efficiency improves, but device complexity increases
Solution Approach 1:
The patent merges the control of multiple transistor devices into a single integrated drive circuit that receives one input signal and coordinates all parallel devices. This combining of control functions simplifies the overall system complexity despite having multiple transistor devices, as the drive circuit automatically manages current distribution and switching for all devices in parallel.
Solution Approach 2:
The drive circuit is designed with multi-functionality to handle both the first type and second type transistor devices through a unified control interface. It can selectively activate or deactivate different transistor types based on load conditions, providing universal control that manages the parallel arrangement without requiring separate control circuits for each device type.
3Speed
If transistor switching frequency is increased to improve response time, then switching speed improves, but switching losses increase
Solution Approach 1:
The patent implements dynamic control where the drive circuit adjusts the switching behavior of transistor devices based on real-time load conditions. By dynamically selecting which transistor type to activate (first or second type) and adjusting their individual switching frequencies according to load demands, the system optimizes the trade-off between switching speed and switching losses, avoiding excessive switching activity when not needed.
4Device complexity
If a single transistor type is used for all load conditions, then device simplicity is maintained, but adaptability to different load parameters decreases
Solution Approach 1:
The drive circuit dynamically adapts its operation based on load parameters by selectively activating or deactivating different transistor types. Under light load conditions, it may use only the first type transistor; under heavy load conditions, it activates both first and second type transistors in parallel. This dynamic adaptation allows the system to optimize performance for different load scenarios without requiring physically different hardware configurations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively minimizes conduction and switching losses by dynamically controlling the second type transistor device based on load signals, resulting in lower overall losses compared to conventional transistor devices with similar current ratings.
Implementation Method 1
Each of the first type transistor device and the at least one second type transistor device includes a control node, a load path between a first load node and a second load node, a two-dimensional electron gas (2DEG) in the load path, and a field plate adjacent the 2DEG
Data Source
AI summary
An electronic circuit includes a transistor arrangement with a plurality of transistor devices, each including a control node and a load path between a first load node and a second load node, and having the load paths connected in parallel. The electronic circuit further includes a drive circuit coupled to the control node of each of the plurality of transistor devices, and configured to receive an input signal. Each of the plurality of transistor devices includes a two-dimensional electron gas (2DEG) in the load path, and a field plate adjacent the 2DEG. The drive circuit is configured to receive a load signal that represents at least one load parameter of the transistor arrangement and is configured to one of activate and deactivate at least one of the plurality of transistor devices based on the load signal.