Parallel ADC Preprocessing to Reduce Sampling Dead Time
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Solution Overview
Problem
Existing measurement instruments face inefficiencies in processing analog-to-digital conversion and data storage, leading to increased 'dead time' during data processing, which can result in missed rare events due to the system being occupied with processing rather than sampling.
Innovation Solution
Implementing a parallel computation block with a pipelined ADC that converts analog signals into parallel digital data samples, allowing for simultaneous pre-processing by field programmable gate arrays (FPGAs), digital signal processors (DSPs), or other devices, followed by storage, thereby reducing processing time and enabling continuous sampling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If data samples are stored in memory before processing, then processing can be performed on the digital data, but the system experiences increased dead time and cannot sample new input during processing
Solution Approach 1:
The patent divides the data processing system into multiple parallel processing channels, each capable of independently processing data samples. By segmenting the single processing bottleneck into multiple concurrent processors, the system can process multiple sets of data samples simultaneously, eliminating the dead time where no sampling occurs while maintaining accurate digital conversion of each channel.
2Device complexity
If a single processor processes all data samples sequentially, then processing is simpler, but the processing time increases and sampling continuity is interrupted
Solution Approach 1:
The patent combines multiple processing resources into a parallel processing architecture where multiple processors work simultaneously on different data samples. This merging of processing capabilities increases overall productivity and data processing speed while maintaining manageable complexity through standardized processing channels.
Solution Approach 2:
The patent implements preliminary action by performing data preprocessing operations such as decimation and filtering in parallel before the main processing stage. This preliminary processing reduces the data burden on subsequent processing stages and enables continuous sampling without interruption, as preprocessing occurs concurrently with main processing operations.
3Reliability
If the processor is occupied with processing existing data samples, then current data is processed thoroughly, but new rare events at the input may be missed
Solution Approach 1:
The patent ensures continuity of useful action by implementing parallel processing channels that continuously sample and process data without interruption. While one processing channel is analyzing existing data samples, other channels simultaneously acquire new samples, ensuring that rare events are captured without loss while maintaining thorough processing of current data through dedicated processing resources.
Data Source
AI summary
An apparatus for pre-processing data samples from parallelized analog-to-digital converters (ADC). An ADC converts an analog signal into N parallel digital data samples that are output on N ADC links x0 through xN-1. A parallel computation block in communication with the ADC processes the data samples in parallel prior to storage into a memory.