Parallel ADC Signal Conditioning for Broadband Dynamic Range

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Solution Overview

Problem

Existing analog-to-digital converters (ADCs) face challenges in efficiently processing broadband signals due to stringent dynamic range requirements, leading to clipping and quantization noise issues, which complicates receiver design and increases bit error rates.

Innovation Solution

A multiple ADC architecture with signal conditioning units and digital signal processing units that manipulate and process analog input signals across multiple parallel paths, allowing different ADCs to handle specific portions of the signal, thereby reducing dynamic range requirements and improving robustness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single ADC is used to process broadband signals, then the dynamic range requirements become extremely stringent, but this leads to clipping and quantization noise issues

Engineering Contradiction:
Improvesignal processing reliabilityVSAvoidclipping and quantization noise
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent divides the broadband signal processing into multiple parallel ADC paths, each handling a specific portion of the signal spectrum or amplitude range. This segmentation allows each ADC to operate within optimized dynamic range parameters, preventing clipping and quantization noise while maintaining overall signal integrity through digital recombination of the parallel paths.

Inventive Principle:
Principle #1Segmentation

2Object-affected harmful factors

If multiple ADCs are used in parallel, then clipping and quantization noise are reduced, but the device complexity increases

Engineering Contradiction:
Improveclipping and quantization noiseVSAvoidconverter architecture complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges multiple parallel ADC paths into a unified digital output by recombining their outputs in the digital domain. This merging approach maintains the benefits of reduced clipping and quantization noise from individual ADCs while managing system complexity through integrated digital signal processing that coordinates the parallel paths.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs multiple ADCs with identical or similar architectures, each performing the same basic conversion function but operating on different signal portions. This universality allows for standardized design components while achieving enhanced overall performance through parallel operation and digital recombination.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Manufacturing precision

If automatic gain control is used to adjust noise levels, then the ADC can be optimized, but the procedure becomes complex and lacks reliability

Engineering Contradiction:
ImproveADC optimizationVSAvoidcontrol procedure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary signal conditioning and splitting before the ADC conversion stage, preparing the signal in advance to match the ADC's optimal input range. This preliminary action eliminates the need for complex automatic gain control procedures during operation, as the signal is pre-configured for optimal conversion across multiple parallel paths.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7944383B2Data processing device comprising ADC unit
Publication Date: 2011.05.17 NXP BV
  • US7944383B2 patent drawing
  • US7944383B2 patent drawing
  • US7944383B2 patent drawing

AI summary

A device (100) for processing data, the device (100) comprising a plurality of signal paths (130, 140, 150) each receiving an identical analog input signal (104), at least one signal conditioning unit (101 to 103) in at least one of the plurality of signal paths (130, 140, 150), wherein each signal conditioning unit (101 to 103) is adapted for generating a respective analog intermediate signal (105 to 107) by manipulating a property, particularly an amplitude, of the analog input signal (104), and a plurality of analog to digital converting units (108 to 110) each of which being assigned to a corresponding one of the plurality of signal paths (130, 140, 150) and being supplied with the analog input signal (104) or a respective analog intermediate signal (105 to 107), wherein each of the plurality of analog to digital converting units (108 to 110) is adapted for generating a respective digital intermediate signal (111 to 113) based on the respective analog intermediate signal (105 to 107) or based on the analog input signal (104); a digital signal processing unit (114) supplied with the plurality of digital intermediate signals (111 to 113) and adapted for generating a digital output signal (115) by processing the digital intermediate signals (111 to 113).