Parallel ADC Error Estimation for Offset and Gain Correction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing ADC architectures face challenges in accurately correcting for both offset and gain errors, particularly due to flicker noise and dynamic changes in transfer functions, leading to signal distortion and inefficiencies in calibration processes.

Innovation Solution

A parallel ADC architecture that utilizes two ADCs connected to a shared input, with a controller applying dither signals to estimate offset and gain errors by solving a system of equations formed from the ADC outputs during mission mode, effectively canceling out unknown signal errors and tracking high-frequency noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a single ADC is used for conversion, then the device complexity is low, but the measurement precision deteriorates due to offset and gain errors

Engineering Contradiction:
ImproveADC conversion accuracyVSAvoidADC architecture complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent divides the ADC system into two separate ADCs (first ADC and second ADC) that operate in parallel. Each ADC independently converts the same analog input signal, allowing their outputs to be compared and used for error estimation. This segmentation enables the system to measure and correct offset and gain errors by analyzing the differences between the two ADC outputs, thereby improving measurement precision while managing device complexity through functional division.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If calibration is performed to correct ADC errors, then the measurement precision improves, but the productivity deteriorates due to calibration time

Engineering Contradiction:
ImproveADC error correction accuracyVSAvoidCalibration process efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent performs error estimation and correction calculations using outputs from two ADCs during normal operation without requiring a separate calibration phase. By continuously monitoring the difference between ADC outputs and computing error values in real-time, the system eliminates dedicated calibration time while maintaining measurement precision. This preliminary action approach integrates error correction into the operational workflow rather than treating it as a separate preparatory step.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If dither signals are applied to estimate errors, then the measurement precision improves, but the object-generated harmful factors worsen due to signal distortion

Engineering Contradiction:
ImproveError estimation accuracyVSAvoidSignal distortion from dither
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent uses the difference output between two ADCs as an intermediary signal that contains error information without requiring external dither signals. By computing the difference between ADC1 and ADC2 outputs, the system extracts offset and gain error components directly from the operational signals. This intermediary approach eliminates the need for additional dither signals that would otherwise distort the input signal, while still enabling precise error estimation through the natural variation in ADC transfer functions.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12517172B2Methods and apparatus to estimate analog to digital converter (ADC) error
Publication Date: 2026.01.06 TEXAS INSTRUMENTS INC
  • US12517172B2 patent drawing
  • US12517172B2 patent drawing
  • US12517172B2 patent drawing

AI summary

An example apparatus includes programmable circuitry configured to: determine a first output voltage from a first analog to digital converter (ADC) responsive to the first ADC and a second ADC both receiving a first input voltage; determine a first output voltage from a second ADC responsive to the first ADC and a second ADC both receiving the first input voltage; determine a second output voltage from the first ADC responsive to the first ADC receiving a second input voltage and the second ADC receiving the first input voltage; and determine an error value for the first ADC based on: (a) a difference between the first output voltage from the first ADC and the first output voltage from the second ADC, and (b) a difference between the first output voltage from the first ADC and the second output voltage from the first ADC.