Parallel Power Amplifier With Quadrature Hybrid Phase Control
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Solution Overview
Problem
Designing power amplifiers is challenging due to issues like transistor breakdown voltages, hot carrier effects, choke inductor losses, distortions, and trade-offs between efficiency and linearity.
Innovation Solution
A parallel power amplifier circuit using two separate power amplifiers operating in different classes (class B and C) with slab inductors and quadrature hybrids to reduce amplitude-to-phase distortion by controlling input capacitance and phase characteristics, and integrating these components onto a single integrated circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If power amplifiers operate at high voltage swings to achieve high efficiency, then efficiency is improved, but transistor breakdown voltages and hot carrier effects worsen
Solution Approach 1:
The power amplifier is divided into multiple parallel amplifier stages, each operating at lower voltage swings. By segmenting the amplification function across multiple units, the system achieves high overall efficiency without subjecting individual transistors to excessive voltage stress that would cause breakdown or hot carrier effects.
Solution Approach 2:
Multiple power amplifiers are combined in parallel to achieve high overall output power and efficiency. Each amplifier operates at moderate voltage levels, but their combined output delivers the required high power, thus achieving high efficiency without compromising transistor reliability through excessive voltage swings in any single device.
2Manufacturing precision
If parallel power amplifiers are used to reduce amplitude-to-phase distortion, then linearity is improved, but device complexity increases
Solution Approach 1:
The amplification function is segmented into multiple parallel amplifier stages, each contributing to the overall output. This segmentation enables better control of amplitude-to-phase distortion by allowing individual stages to operate in optimized regimes, improving linearity despite the increased number of components.
Solution Approach 2:
By adjusting the operating parameters of each parallel amplifier stage (such as bias points and impedance transformations), the system achieves reduced amplitude-to-phase distortion. The parameter optimization across multiple stages provides linearity improvement that outweighs the complexity increase.
3Power
If choke inductors are used for impedance transformation, then power amplification is achieved, but inductor losses increase
Solution Approach 1:
The impedance transformation and power amplification functions are distributed across multiple parallel amplifier stages rather than relying on a single high-power choke inductor. This segmentation reduces the power handling burden on individual inductors, thereby reducing resistive losses and improving overall efficiency.
4Area of stationary object
If integrated circuit implementation is used to reduce area, then device area is reduced, but manufacturing precision requirements increase
Solution Approach 1:
Multiple power amplifier stages and their associated impedance transformation networks are merged into a single integrated circuit implementation. This consolidation reduces the overall device area by eliminating discrete components and interconnections, though it does require precise manufacturing to ensure proper matching and performance of the integrated structures.
Data Source
AI summary
A parallel power amplifier includes a carrier amplifier and peak amplifier coupled to receive signals from a quadrature hybrid made up of slab inductors in an integrated circuit. The slab inductors may be on different layers in the integrated circuit and may have similar or dissimilar shapes.