Parallel Bit Interleaving for QC-LDPC Folding Section Mapping
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Solution Overview
Problem
Existing bit-interleaved coding and modulation systems with quasi-cyclic low-density parity-check codes face inefficiencies in interleaving codewords, particularly due to impaired parallelism and limited configuration options when the number of cyclic blocks is not a multiple of the bit interleaver's columns, leading to increased latency and suboptimal performance.
Innovation Solution
A bit interleaving method that permutes codewords into constellation words by selecting a subset of cyclic blocks such that their number is a multiple of the divisor M, dividing the codeword into folding sections, and mapping bits from multiple cyclic blocks to each constellation word, ensuring efficient interleaving and improved parallelism.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional bit interleaving is applied to QC-LDPC codes, then the interleaving process can be performed, but parallelism is impaired and latency increases when the number of cyclic blocks is not a multiple of the interleaver columns
Solution Approach 1:
The patent divides the codeword into multiple cyclic blocks and further segments them into folding sections. By selecting a subset of cyclic blocks that forms a complete number of folding sections, the system ensures that each folding section can be processed independently in parallel, thereby improving productivity while controlling latency.
Solution Approach 2:
The patent dynamically adjusts the number of cyclic blocks used for interleaving by selecting a subset that is a multiple of M/F. This dynamic selection allows the system to adapt to different code rates and block sizes while maintaining optimal parallelism and minimizing latency.
2Adaptability or versatility
If conventional bit interleving is applied to QC-LDPC codes, then the process can handle various code configurations, but configuration options are limited when the number of cyclic blocks is not a multiple of the interleaver columns
Solution Approach 1:
The patent creates a universal interleaving structure based on folding sections that can handle any QC-LDPC code configuration. By defining the number of folding sections as N'/(M/F) where N' is a multiple of M/F, the system achieves multi-functionality that adapts to different code rates, block sizes, and constellation sizes without requiring different interleaver structures.
Solution Approach 2:
The patent changes key parameters including the number of folding sections, the number of cyclic blocks per folding section, and the mapping relationship between constellation words and folding sections. These parameter changes allow the system to maintain configuration flexibility while avoiding the complexity of designing multiple specialized interleavers for different scenarios.
3Productivity
If bits are mapped from multiple cyclic blocks to each constellation word, then parallelism is enhanced, but the mapping complexity increases
Solution Approach 1:
The patent introduces folding sections as an intermediary structure between cyclic blocks and constellation words. Each folding section contains M/F cyclic blocks and maps to a specific set of constellation words. This intermediary simplifies the mapping process by organizing the many-to-many relationship into a structured format where each folding section independently maps to its associated constellation words, thereby enhancing parallelism while controlling mapping complexity.
Data Source
AI summary
A bit interleaving method involves applying a bit permutation process to bits of a QC-LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword after the permutation process into a plurality of constellation words each including M bits, the codeword being divided into F×N′/M folding sections (N′ being a subset of N selected cyclic blocks and being a multiple of M/F), each of the constellation words being associated with one of the F×N′/M folding sections, and the bit permutation process being applied such that each of the constellation words includes F bits from each of M/F different cyclic blocks in a given folding section associated with a given constellation word.