Parallel Bit Interleaver Layout for QC-LDPC Folding Sections
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Solution Overview
Problem
Existing bit-interleaved coding and modulation systems with quasi-cyclic low-density parity-check codes face inefficiencies in interleaving, particularly when the number of cyclic blocks is not a multiple of the bit interleaver's columns, leading to impaired parallelism and increased latency, especially in iterative decoding scenarios.
Innovation Solution
A bit interleaving method that permutes codewords into constellation words by selecting a subset of cyclic blocks such that their number is a multiple of the divisor M, dividing the codeword into folding sections, and applying a bit permutation process to map M bits from each cyclic block to different constellation words, ensuring all bits in a section are mapped to only Q constellation words associated with that section.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of cyclic blocks is not a multiple of the bit interleaver's columns, then the interleaving can accommodate arbitrary code lengths, but parallelism is impaired and latency increases
Solution Approach 1:
The patent segments the cyclic blocks into groups of M/F blocks, where each group forms a complete processing unit for the bit interleaver. This segmentation allows the system to handle arbitrary total numbers of cyclic blocks by organizing them into complete groups, thereby maintaining parallelism efficiency while accommodating variable code lengths.
Solution Approach 2:
The patent introduces the folding factor F as a parameter that can be adjusted to optimize the grouping of cyclic blocks. By changing the value of F, the system can adapt the group size (M/F blocks per group) to maintain efficient parallel processing while supporting different code lengths and interleaver configurations.
2Adaptability or versatility
If the number of cyclic blocks is not a multiple of the bit interleaver's columns, then the interleaving can accommodate arbitrary code lengths, but decoding latency increases
Solution Approach 1:
The patent segments the cyclic blocks into groups of M/F blocks, where each group forms a complete processing unit for the bit interleaver. This segmentation allows the system to handle arbitrary total numbers of cyclic blocks by organizing them into complete groups, thereby maintaining parallelism efficiency while supporting variable code lengths.
Solution Approach 2:
The patent performs preliminary organization of cyclic blocks into complete groups of M/F blocks before the bit interleaving process. This preliminary action ensures that the data is properly structured for efficient parallel processing, preventing latency issues during the actual interleaving and decoding operations.
3Productivity
If all bits in a folding section are mapped to only Q constellation words, then mapping efficiency is improved, but the interleaving structure becomes more complex
Solution Approach 1:
The patent introduces the folding factor F as a parameter that controls the mapping structure. By adjusting F, the system can optimize the balance between mapping efficiency and structural complexity. The folding mechanism allows bits from M/F cyclic blocks to be mapped to Q constellation words in a structured manner that improves efficiency while keeping the complexity manageable through parameter control.
Solution Approach 2:
The patent creates a universal mapping structure that can handle different values of M, F, and Q by using the folding factor as a configurable parameter. This multi-functional approach allows the same interleaving structure to achieve efficient mapping for various constellation sizes and code configurations without requiring completely different structures for each case.
Data Source
AI summary
A bit interleaving method involves applying a bit permutation process to bits of a QC-LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword after the permutation process into a plurality of constellation words each including M bits, the codeword being divided into F×N′/M folding sections (N′ being a subset of N selected cyclic blocks and being a multiple of M/F), each of the constellation words being associated with one of the F×N′/M folding sections, and the bit permutation process being applied such that each of the constellation words includes F bits from each of M/F different cyclic blocks in a given folding section associated with a given constellation word.