Parallel Bit Interleaving for QC-LDPC Low-Latency Decoding
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Solution Overview
Problem
Existing bit-interleaved coding and modulation (BICM) systems with quasi-cyclic low-density parity-check codes face inefficiencies in interleaving, leading to impaired parallelism and increased latency, particularly in iterative decoding processes, due to limitations in the number of cyclic blocks and column twisting in the DVB-T2 standard.
Innovation Solution
A bit interleaving method that applies a bit permutation process to quasi-cyclic low-density parity-check codes, dividing codewords into constellation words and performing intra-cyclic-block permutations to optimize the mapping of bits onto constellations, ensuring efficient interleaving by mapping M bits from different cyclic blocks to each constellation word and associating all constellation words with specific cyclic blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional bit interleaving is applied to QC-LDPC codewords, then the interleaving process can be completed, but parallelism is impaired and latency increases
Solution Approach 1:
The codeword is divided into multiple sections, where each section contains a specific number of cyclic blocks. This segmentation enables parallel processing of different sections simultaneously, improving interleaving efficiency and reducing latency by avoiding sequential processing of the entire codeword.
Solution Approach 2:
The patent introduces dynamic section permutation and intra-cyclic-block permutation operations that adapt the interleaving pattern based on the codeword structure. This dynamic approach optimizes parallelism by allowing flexible reorganization of bits across sections while maintaining the ability to process multiple sections concurrently.
2Adaptability or versatility
If the number of cyclic blocks is limited as in DVB-T2 standard, then system compatibility is maintained, but interleaving efficiency is reduced
Solution Approach 1:
The patent introduces a section dimension in addition to the traditional cyclic block structure. By organizing cyclic blocks into multiple sections and applying section-level permutation operations, the system achieves improved interleving efficiency without changing the fundamental number of cyclic blocks, thus maintaining DVB-T2 compatibility while adding a new processing dimension.
3Reliability
If column twisting is applied to improve interleaving, then bit distribution is optimized, but device complexity increases
Solution Approach 1:
The column twisting operation is divided into section-level permutations and intra-cyclic-block permutations. This segmentation of the permutation operation reduces implementation complexity by allowing each section to be processed independently with simpler permutation logic, while still achieving optimal bit distribution across the entire codeword.
Data Source
AI summary
A bit interleaving method applying a bit permutation process to a QC LDPC codeword made up of N cyclic blocks of Q bits each, dividing the processed codeword into constellation words of M bits each, and applying an intra-cyclic-block permutation process to the cyclic blocks, where the codeword is divided into F×N/M folding sections of M/F cyclic blocks each and the constellation words are each associated with one of the folding sections, and the bit permutation process is applied such that the constellation words are each made up of F bits from each of M/F different cyclic blocks in the associated section, after the permutation process.