Parallel Bonding Wire Inductor for High Q Factor
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Solution Overview
Problem
Inductors in integrated circuits (ICs) face challenges due to high substrate losses and signal attenuation caused by silicon substrates, which limit their quality factor (Q) and inductance, especially when integrated with other elements, requiring innovative configurations to enhance performance without increasing IC size.
Innovation Solution
The inductor design includes bonding pads, lead pins, and bonding wires forming a closed loop with optimized structures such as non-horizontal and vertical configurations, parallel connections, and varied heights to maximize flux linkage and inductance, while minimizing flux coupling and substrate losses, using metals with low resistance to reduce total resistance and increase Q.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single bonding wire is used to connect bonding pads to lead pins, then the structure is simple and manufacturing is easier, but the inductance is insufficient and quality factor Q is low
Solution Approach 1:
The patent combines multiple bonding wires (first bonding wire and second bonding wire) to form a parallel connection between bonding pads and lead pins. This merging of multiple conductive paths increases the total inductance and quality factor Q while maintaining manufacturing feasibility through standardized wire bonding processes
2Reliability
If bonding pads are placed separately from lead pins requiring larger IC substrate, then connection is easier and signal integrity is improved, but the IC size increases reducing integration
Solution Approach 1:
The patent utilizes the vertical dimension by forming bonding wires that extend vertically from bonding pads on the semiconductor chip surface to lead pins on the package substrate. This three-dimensional arrangement allows compact integration while maintaining effective electrical connection and signal integrity
3Reliability
If metal wiring with low specific resistance is used to decrease serial resistance, then the quality factor Q improves, but manufacturing complexity increases due to specialized metal deposition processes
Solution Approach 1:
The patent changes the geometric parameters of the bonding wires by using multiple wires in parallel configuration. This approach reduces the effective serial resistance through increased conductive cross-section without requiring specialized low-resistance metal materials or complex deposition processes, maintaining compatibility with standard wire bonding manufacturing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively increases the quality factor (Q) and inductance of the inductor, improving operational characteristics and reducing signal attenuation, while allowing for more compact and integrated designs within ICs.
Implementation Method 1
the first bonding wire, the second bonding wire, the lead pin, and the board trace are configured to form a closed loop and maximize a flux linkage that passes the closed loop
Implementation Method 2
an arm configured by the first bonding wire and the second bonding wire to include a non-horizontal structure to minimize a flux coupling formed between an other arm
Data Source
AI summary
An inductor is provided. The inductor includes first and second bonding pads on a semiconductor substrate, a lead pin on a board trace, a first bonding wire being configured to connect the first bonding pad and the lead pin, and a second bonding wire configured to connect the second bonding pad and the lead pin, the second bonding wire being connected to the first bonding wire in parallel.