Parallel Boot Initialization for iSCSI Devices

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Solution Overview

Problem

Current information handling systems experience significant delays during booting from external devices via iSCSI due to time-consuming device initialization processes, leading to unacceptable waiting times for users.

Innovation Solution

The method involves initializing a base processor and secondary processors for parallel processing of initialization functions, with the processing manager offloading tasks to secondary processors in response to a predetermined trigger event, such as a call from the system BIOS, to expedite the boot process and reduce overall boot time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If device initialization is performed sequentially in the BIOS post before booting, then the boot process is completed in a structured manner, but the boot time is significantly extended due to the time-consuming initialization process

Engineering Contradiction:
Improveboot timeVSAvoidsystem startup efficiency
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent applies preliminary action by initializing secondary processors and offloading device initialization tasks before the main boot sequence begins. The secondary processors are prepared in advance to handle initialization functions parallel to the BIOS post execution, so that when the boot sequence starts, the initialization work is already underway or completed, significantly reducing the perceived boot time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the boot process by dividing initialization functions between the base processor and secondary processors. The base processor handles critical boot path tasks while secondary processors handle device initialization in parallel. This segmentation allows simultaneous execution of multiple initialization tasks, transforming a sequential bottleneck into a parallel processing workflow that reduces overall boot time.

Inventive Principle:
Principle #1Segmentation

2Speed

If all initialization functions are processed by the base processor, then the system maintains simple processor architecture, but the boot process becomes slow due to single-threaded processing

Engineering Contradiction:
Improveboot process speedVSAvoidprocessor configuration complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent segments processor responsibilities by introducing secondary processors that handle specific initialization functions. The base processor focuses on critical boot path tasks while secondary processors handle device initialization, option ROM processing, and other preparatory functions. This functional segmentation enables parallel execution and improves boot speed without requiring complex multi-core coordination.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary mechanism where secondary processors act as assistants to the base processor during the boot process. These secondary processors are initialized by the base processor and then work in parallel to handle initialization tasks, effectively multiplying processing capacity without requiring a complete redesign of the processor architecture. The base processor maintains control while delegating specific tasks to secondary processors.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9785446B2Efficient boot from a connected device
Publication Date: 2017.10.10 DELL PROD LP
  • US9785446B2 patent drawing
  • US9785446B2 patent drawing
  • US9785446B2 patent drawing

AI summary

Methods and systems for efficient boot from a connected device are described. In an embodiment, a method for efficient boot from a connected device may include initializing a base processor device for boot and configuration of an information handling system from a connected device. The method may also include initializing at least one secondary processor for parallel processing of one or more initialization functions. Additionally, the method may include offloading one or more initialization functions to the one or more secondary processors in response to a predetermined trigger event.