Parallel Data Placement Buffer Sharing in Memory Sub-Systems

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Solution Overview

Problem

Conventional memory sub-systems face increased write amplification and reduced performance due to inefficient garbage collection and lack of host control over data placement, leading to excessive use of fast memory resources for accumulation buffers.

Innovation Solution

Dynamically allocate accumulation buffers to data placement handlers on demand, utilizing backup spaces in storage media for time-sharing, and implementing a communication protocol that supports flexible direct placement (FDP) and zoned namespace (ZNS) to optimize resource usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a large number of data placement handlers are run in parallel to support host control of data placement, then host control capability and data placement flexibility are improved, but fast memory resource consumption for accumulation buffers increases excessively

Engineering Contradiction:
Improvehost control capabilityVSAvoidfast memory resource consumption
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

Multiple data placement handlers share a single accumulation buffer through time-multiplexed allocation. The buffer is dynamically assigned to different handlers based on their current operational needs, allowing parallel handlers to cooperate and share fast memory resources rather than each requiring dedicated buffers.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The accumulation buffer allocation is dynamically adjusted based on real-time handler activity. When a handler needs the buffer, it is allocated; when not needed, it is deallocated and made available to other handlers. This dynamic time-sharing approach allows the system to support many more parallel handlers than the ratio of fast memory resources would otherwise permit.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If conventional garbage collection is used without host control, then system simplicity is maintained, but write amplification increases and performance decreases

Engineering Contradiction:
Improvesystem simplicityVSAvoidwrite amplification
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The host system provides feedback control over data placement by issuing directives to the memory sub-system about where data should be written. This feedback mechanism allows the host to optimize data placement patterns, enabling more efficient garbage collection and reducing write amplification while maintaining reasonable system complexity through standardized communication protocols.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

A communication protocol acts as an intermediary between the host and memory sub-system, carrying data placement directives that guide the memory controller's garbage collection and data placement operations. This intermediary layer enables sophisticated control without requiring complex direct integration between host and memory management functions.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If dedicated accumulation buffers are allocated to each data placement handler, then handler operation reliability is improved, but resource allocation efficiency deteriorates

Engineering Contradiction:
Improvehandler operation reliabilityVSAvoidresource allocation efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The accumulation buffer is periodically allocated to different data placement handlers in a time-multiplexed fashion. Each handler receives dedicated buffer access when it needs to perform accumulation operations, ensuring operational reliability, while the periodic reassignment to different handlers maximizes resource utilization efficiency.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS20260029950A1Dynamic Buffer Management for Parallel Data Placement Handlers in a Data Storage Device
Publication Date: 2026.01.29 MICRON TECHNOLOGY INC
  • US20260029950A1 patent drawing
  • US20260029950A1 patent drawing
  • US20260029950A1 patent drawing

AI summary

A memory sub-system having a first memory configured as a non-volatile storage medium of the memory sub-system; and a second memory having an access speed faster than the first memory. A processing device of the memory sub-system is configured to: run a plurality of data placement handlers concurrently; allocate a plurality of data buffers from the second memory to the plurality of data placement handlers respectively; reserve a plurality of backup spaces from the first memory for the plurality of data placement handlers respectively; allocate accumulation buffers from the second memory; and arrange the data placement handlers to time share the accumulation buffers via usages of the backup spaces.