Parallel Bus Encoding to Suppress Simultaneous Switching Noise

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Solution Overview

Problem

Computing systems face challenges in maintaining performance due to variations in power supply voltage levels across integrated circuits, leading to increased power consumption and noise, which existing designs attempt to mitigate with additional margins that result in higher power usage and larger circuit sizes.

Innovation Solution

A system and method that includes an encoder unit and transceiver units capable of dynamically adjusting data encoding schemes based on transmission quality, selecting between different numbers of data bits to minimize noise and power consumption by encoding data into silent or quiet code words that reduce simultaneous switching outputs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional margin is added into the design to compensate for power supply voltage variations, then system reliability is improved, but power consumption increases and circuit area expands

Engineering Contradiction:
Improvesystem performanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the encoding scheme adjustable rather than fixed. The system dynamically selects between different encoding modes (first encoding scheme with M bits, second encoding scheme with P bits) based on transmission quality feedback. This dynamic adaptation allows the system to optimize power consumption by using the more efficient encoding scheme when transmission conditions permit, while maintaining reliability when conditions deteriorate.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of encoding bit width (M vs P bits) to adapt to varying transmission conditions. By modifying the encoding scheme parameters based on feedback about transmission quality, the system can operate at different power and reliability levels, resolving the contradiction between maintaining high reliability and reducing power consumption.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If additional margin is added into the design to compensate for power supply voltage variations, then system reliability is improved, but circuit area increases

Engineering Contradiction:
Improvesystem performanceVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent makes the circuit area requirement dynamic by implementing an adjustable encoding scheme. Instead of designing for the worst-case scenario with fixed margin, the system adapts its encoding complexity based on actual transmission quality, allowing the effective circuit area utilization to vary with conditions rather than being permanently oversized.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the encoding parameter (number of bits M or P) to match transmission conditions, avoiding the need for permanently oversized circuits designed for worst-case scenarios. This parameter adaptation allows the circuit to operate efficiently with smaller effective area when conditions allow.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If fixed encoding scheme is used, then device complexity is reduced, but adaptability to varying transmission conditions deteriorates

Engineering Contradiction:
Improveencoding schemeVSAvoidnoise tolerance
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent implements feedback by receiving information about transmission quality and using it to select the appropriate encoding scheme. This feedback mechanism allows the system to adapt to varying noise conditions and transmission quality, resolving the contradiction between simplicity and adaptability by automating the selection process based on actual conditions.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system transitions from a static encoding scheme to a dynamic one that automatically adjusts based on feedback. This dynamic behavior provides adaptability to varying conditions while keeping the underlying encoding mechanisms relatively simple, as the system only needs to switch between predefined schemes rather than implement complex real-time encoding optimization.

Inventive Principle:
Principle #15Dynamics

4Speed

If parallel interface is used to communicate multiple bits simultaneously, then transmission speed is improved, but simultaneous switching output noise increases

Engineering Contradiction:
Improvedata transmission rateVSAvoidswitching noise
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent changes the encoding parameters (using silent or quiet code words with specific bit patterns) to reduce the number of simultaneous switching outputs. By carefully selecting code words that minimize transitions, the system maintains high-speed parallel transmission while reducing the harmful switching noise that would otherwise be generated by multiple bits changing state simultaneously.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9632883B2Digital encoding of parallel busses to suppress simultaneous switching output noise
Publication Date: 2017.04.25 ORACLE INT CORP
  • US9632883B2 patent drawing
  • US9632883B2 patent drawing
  • US9632883B2 patent drawing

AI summary

An apparatus and method for encoding data are disclosed that may allow for different encoding levels of transmitted data. The apparatus may include an encoder unit and a plurality of transceiver units. The encoder unit may be configured to receive a plurality of data words, where each data word includes N data bits, wherein N is a positive integer greater than one, and encode a first data word of the plurality of data words. The encoded first data word may include M data bits, where M is a positive integer greater than N. Each transceiver unit may transmit a respective data bit of the encoded first data word. The encoder unit may be further configured to receive information indicative of a quality of transmission of the encoded first data word, and encode a second data word of the plurality of data words dependent upon the quality.