Parallel CABAC Decoding for High-Bitrate Video Throughput
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Solution Overview
Problem
Existing H.264 Context Adaptive Binary Arithmetic Coding (CABAC) decoding implementations have limited throughput, requiring high clock frequencies and significant power consumption, making it difficult to decode high bit-rate video streams in real-time, especially for higher quality video images like 1080p60.
Innovation Solution
A parallel two bins per cycle arithmetic decoding engine is developed, which reduces clock frequency requirements and increases throughput by performing parallelization and speed improvements in CABAC engine blocks, allowing for simultaneous decoding of two binary symbols in each cycle.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional sequential CABAC decoding is used, then decoding accuracy is maintained, but throughput is limited and power consumption is high
Solution Approach 1:
The decoding process is segmented into independent parallel paths, where multiple binary symbols are decoded simultaneously through separate decoding circuits operating in parallel, rather than sequentially processing one symbol at a time
Solution Approach 2:
The patent transitions from single-dimensional sequential processing to multi-dimensional parallel processing by introducing additional processing dimensions through parallel decoding circuits, enabling multiple symbols to be decoded concurrently across different spatial dimensions of the processing architecture
2Productivity
If high clock frequencies are used to increase throughput, then decoding speed improves, but power consumption increases and hardware complexity increases
Solution Approach 1:
The hardware is segmented into multiple independent decoding circuit blocks, each capable of processing binary symbols in parallel, reducing the complexity of individual blocks while maintaining high overall throughput through concurrent operation
Solution Approach 2:
Multiple parallel decoding circuits are merged into a unified decoding architecture that processes multiple binary symbols simultaneously, achieving high throughput without requiring extremely high clock frequencies by combining the capabilities of multiple parallel processing units
3Productivity
If traditional sequential decoding is used, then implementation simplicity is maintained, but real-time decoding of high bit-rate video streams is difficult
Solution Approach 1:
The decoding engine is divided into multiple independent processing units that can operate simultaneously on different binary symbols, enabling real-time processing of high bit-rate video streams by distributing the computational load across parallel segments
Solution Approach 2:
The patent introduces parallel processing dimensions to the decoding engine, transforming it from a single-threaded sequential processor to a multi-threaded parallel processor capable of handling high bit-rate video streams in real-time by utilizing additional processing dimensions
Data Source
AI summary
A method of video decoding is provided that includes receiving a data stream comprising a sequence of syntax elements that were compressed using context-adaptive binary arithmetic coding (CABAC), such that the encoding of each bin of a bin string representative of a syntax element was performed by arithmetic encoding. Two consecutive bins of a syntax element are decoded in parallel. Speculative computation and prefetching is used to reduce the critical path and thereby improve processing speed.