Parallel Capture Engines for Line-Rate Packet Analysis

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Solution Overview

Problem

Current methods for testing packet switched networks and devices often fail to generate a line-rate or near line-rate test stream effectively, which is necessary for thorough network performance evaluation and fault isolation.

Innovation Solution

A network test equipment system that includes traffic generators and receivers, utilizing field programmable gate arrays (FPGAs) and other devices to create and analyze high-speed packet streams, with features like timestamping, out-of-sequence detection, and capture units to manage and store packets for analysis.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single capture engine is used to receive test streams, then device complexity is reduced, but productivity decreases because it cannot effectively handle line-rate or near line-rate test streams

Engineering Contradiction:
Improveability to handle line-rate test streamsVSAvoidnumber of capture engines
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system divides the capture function into multiple parallel capture engines (first capture engine, second capture engine, etc.), each capable of independently receiving and processing portions of the test stream. This segmentation enables the system to handle line-rate traffic by distributing the load across multiple engines rather than overloading a single engine.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple capture engines are combined and synchronized to work together as a unified system. The patent describes coupling the output of multiple capture engines to a common output, allowing them to collectively process high-volume traffic while maintaining the functionality of individual engines. This merging achieves line-rate handling capability without sacrificing the simplicity of individual engine design.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If multiple parallel capture engines are used to achieve line-rate capture, then productivity increases, but device complexity increases due to synchronization requirements

Engineering Contradiction:
Improveline-rate capture capabilityVSAvoidsynchronization mechanism complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system employs a synchronization mechanism that monitors the operation of multiple capture engines and provides feedback control. This feedback system ensures that all engines remain synchronized during operation, coordinating their capture and output activities to maintain timing consistency across the parallel engines without requiring complex manual coordination.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The capture engines are designed to be self-synchronizing through their coupling architecture. Each engine independently performs its capture function while the shared output interface and control logic automatically coordinate their operations. This self-service approach reduces the need for external synchronization control, simplifying the overall system while maintaining line-rate capability.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If capture memory size is increased to store more packets for analysis, then measurement precision improves, but device complexity and cost increase

Engineering Contradiction:
Improvepacket capture completenessVSAvoidmemory management complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The capture memory is divided into multiple segments or buffers, each associated with a specific capture engine. This segmentation allows each engine to have its own dedicated storage space, eliminating the need for complex shared memory management while ensuring that captured packets are preserved without overlap or conflict. Each segment can be independently managed, simplifying the overall memory control logic.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The capture memory system is designed to serve multiple functions: storing packets from different capture engines, maintaining packet sequences for reassembly, and providing data for analysis. By creating a multi-functional memory architecture that handles various operations within a unified framework, the system achieves comprehensive packet capture capability without proportionally increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP2239888B1Traffic receiver using parallel capture engines
Publication Date: 2013.05.29 IXIA
  • EP2239888B1 patent drawingFigure 1
  • EP2239888B1 patent drawingFigure 2
  • EP2239888B1 patent drawingFigure 3

AI summary

There is disclosed a method of capturing packets and packet receivers to capture packets. A timestamp (228) may be attached to each packet received from a network (290). Each timestamped packet may be routed to a capture engine (240) of a plurality of capture engines. Each of the plurality of capture engines may save at least some packets determined to match one or more of a plurality of predetermined capture criteria. A list of contiguously captured packets in time-stamp order may be prepared (235).