Parallel-Cell Digital Attenuator for Low Phase Error RF Control
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Solution Overview
Problem
Existing digital attenuators face challenges in achieving a wide attenuation range with small phase errors, particularly in silicon processes with low switching performance, and require miniaturization for 5G band terminals and phased array radar systems.
Innovation Solution
A compact digital attenuator design featuring multiple attenuation cells connected in parallel through a transmission line, utilizing N-type transistors as switch elements that can be selectively turned on/off to achieve various attenuation states, minimizing phase errors and chip area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If T- and Pi-attenuators are used, then wide attenuation range and fine attenuation interval are achieved, but large phase errors occur due to parasitic capacitance
Solution Approach 1:
The attenuator is divided into multiple attenuation cells (first attenuation cell to nth attenuation cell), each contributing a specific attenuation amount. This segmentation allows achieving wide attenuation range through combination while minimizing phase errors by distributing the attenuation across multiple small cells rather than using large parasitic capacitance in single T- or Pi-attenuators.
Solution Approach 2:
The patent transitions from traditional series-connected T- and Pi-attenuator structures to a parallel connection architecture where multiple attenuation cells are connected in parallel through transmission lines. This dimensional change in circuit topology eliminates the need for series transistors that cause parasitic capacitance, thereby reducing phase errors while maintaining attenuation precision.
2Object-affected harmful factors
If distributed attenuator is used, then small insertion loss and phase errors are achieved, but large chip area is required due to long transmission lines
Solution Approach 1:
Multiple attenuation cells are merged into a single parallel connection structure, combining their attenuation functions while sharing common transmission line paths. This merging reduces the total transmission line length compared to sequential distributed attenuator cells, thereby minimizing chip area while maintaining low phase errors through the parallel architecture.
3Quantity of substance
If T- and Pi-attenuators are used, then wide attenuation range is achieved, but large chip area is required compared to compact designs
Solution Approach 1:
The attenuation function is segmented into multiple independent cells connected in parallel, each handling a portion of the total attenuation range. This segmentation allows compact packaging because each cell can be small, and their parallel arrangement utilizes space more efficiently than series connections, achieving wide attenuation range in reduced chip area.
Solution Approach 2:
The patent employs a parallel connection topology that changes the spatial arrangement from traditional series layouts to a multi-branch parallel structure. This dimensional reorganization allows multiple attenuation paths to coexist in a compact footprint, reducing chip area while maintaining wide attenuation range through selective cell activation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables a compact, high-resolution digital attenuator with low phase errors, suitable for silicon processes, and miniaturizes transmission and reception chips, enhancing the performance of phased array radar systems and 5G band terminals.
Implementation Method 1
the plurality of switch elements may be turned off as a default, any one of the plurality of switch elements may be selectively turned on according to the attenuation state to attenuate the signal
Data Source
AI summary
Provided is a compact digital attenuator. The compact digital attenuator includes a first attenuation cell to an nth attenuation cell, which include a plurality of attenuation cells connected to each other in parallel through a transmission line, wherein each of the plurality of attenuation cells may include a plurality of switch elements connected to each other in parallel, wherein the plurality of switch elements may be connected to the transmission line through one contact point.


