Parallelizing Electronic Circuit Design Tasks via Master-Slave Architecture

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing electronic design automation (EDA) tools for integrated circuit design are not thread-safe, making parallel processing difficult due to non-thread-safe infrastructure, leading to inefficient use of multi-core processors and unbalanced workload distribution, which hampers the optimization of complex circuit designs.

Innovation Solution

A master-slave approach is employed where the full design database is loaded on a master node, and lightweight polyvalent slave nodes process tasks in parallel, using a nutshell representation of the design that is independent and abstracted, allowing for dynamic task distribution and management without requiring major rewriting of existing tools or incurring significant memory overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If existing EDA tools are used for processing electronic circuit designs, then the tools can perform design tasks, but the tools are not thread-safe and cannot efficiently utilize multi-core processors

Engineering Contradiction:
Improveprocessing speedVSAvoidthread-safety complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system divides the electronic circuit design into multiple independent partitions, each assigned to a separate processing thread. These partitions can be processed in parallel without requiring the entire design to be thread-safe, thus improving productivity while avoiding the complexity of making the whole EDA tool thread-safe.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A master-slave architecture is introduced where a master thread coordinates task distribution and a slave thread executes processing tasks. This intermediary structure enables parallel processing by managing thread safety at the coordination level rather than requiring the entire EDA tool to be thread-safe.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the full design database is loaded on each processing node, then complete design information is available for processing, but significant memory overhead is incurred

Engineering Contradiction:
Improveparallel processing capabilityVSAvoidmemory consumption
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The full design database is segmented into multiple partitions, with each processing thread receiving only the subset of data it needs to process. This reduces memory consumption per thread while maintaining the ability to perform parallel processing on different portions of the design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each processing thread is provided with localized design data relevant to its specific processing tasks rather than the complete design database. This local quality approach reduces memory overhead while ensuring each thread has access to the necessary information for its assigned work.

Inventive Principle:
Principle #3Local quality

3Productivity

If existing EDA tools are used without modification, then tool functionality is preserved, but parallel processing and balanced workload distribution are not achieved

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidimplementation complexity
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

A master-slave coordination layer is introduced as an intermediary between the user and the existing EDA tools. The master thread manages task distribution and workload balancing, while slave threads execute processing tasks, enabling parallel processing without requiring modifications to the core EDA tool functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

Instead of modifying the original EDA tools, the system creates a copying layer that interfaces with the existing tools. This copying approach preserves the original tool functionality while adding parallel processing capabilities through the master-slave architecture, reducing implementation complexity.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS8418094B2Methods, systems, and computer program product for parallelizing tasks in processing an electronic circuit design
Publication Date: 2013.04.09 CADENCE DESIGN SYST INC
  • US8418094B2 patent drawing
  • US8418094B2 patent drawing
  • US8418094B2 patent drawing

AI summary

Disclosed are a method, a system, and a computer program product for implementing compact manufacturing model during various stages of electronic circuit designs. In some embodiments, the method loads the full design database information on the master; distributes the tasks to be processed in parallel; loads a full design on a master; spawns a plurality of slave sessions; sends to at least one slave a nutshell representation of the electronic circuit design; identifies a task to perform in parallel and sends the task to be performed in parallel; and receives execution results or processing results from some of the plurality of slaves and updates one or more databases to incorporate the execution or processing results. In some embodiments, the method allows speeding up the applications without major rewrite without a need for design partition, and without memory penalty.