Parallel Variable-Length Codeword Decoding in Data Processing Units

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Solution Overview

Problem

Current general-purpose processors are inefficient in handling high-capacity network and storage workloads, particularly in processing packet streams due to limitations in serial decoding of variable-length encoded data, which restricts throughput.

Innovation Solution

A highly programmable data processing unit with specialized hardware-based accelerators that perform parallel decoding of variable-length encoded data streams, utilizing detector circuits to identify codewords in parallel and fuser circuits to combine them into super codewords for increased processing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If serial decoding is used for variable-length encoded data streams, then decoding accuracy is maintained, but throughput is limited

Engineering Contradiction:
ImprovethroughputVSAvoiddecoder architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The decoder is divided into multiple detector circuits that each process different portions of the data stream in parallel. Each detector circuit independently identifies potential codewords starting from different bit positions, allowing simultaneous processing of multiple codewords without requiring a single sequential decoding path.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from one-dimensional sequential processing to multi-dimensional parallel processing by introducing multiple detector circuits operating simultaneously. This dimensional expansion allows the system to process multiple potential codeword positions in parallel, dramatically increasing throughput while maintaining decoding accuracy through validation logic.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Speed

If parallel decoding is implemented to increase throughput, then processing speed improves, but determining valid codewords becomes more complex

Engineering Contradiction:
Improvedecoding speedVSAvoidcodeword validation difficulty
Core Design Contradiction:
SpeedVSDifficulty of detecting and measuring

Solution Approach 1:

Detector circuits perform preliminary identification of potential codewords at multiple positions in parallel before validation. This preliminary action captures all possible codeword candidates simultaneously, and subsequent validation logic then determines which candidates are actual valid codewords based on the encoded data structure, resolving the complexity of validating parallel candidates.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The validation logic receives feedback from multiple detector circuits and uses this information to determine which detected codewords are valid. The system incorporates feedback mechanisms that allow detector circuits to adjust their detection based on validation results, ensuring accurate identification of actual codewords while maintaining parallel processing throughput.

Inventive Principle:
Principle #23Feedback

3Productivity

If multiple detector circuits process codewords in parallel, then throughput increases, but resource requirements increase

Engineering Contradiction:
Improvedata processing throughputVSAvoidhardware resources
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The detector circuits are designed as universal, reusable components that can each process multiple potential codeword positions. Rather than creating specialized circuits for each position, the same detector circuit design is replicated and configured to handle different portions of the data stream, reducing overall hardware complexity while maintaining parallel processing capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the functionality of multiple detector circuits with validation logic into an integrated decoder architecture. By combining detection and validation functions in a unified structure, the system reduces the total hardware resources required compared to having completely separate detection and validation subsystems, while still achieving parallel processing throughput.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10862513B2Data processing unit having hardware-based parallel variable-length codeword decoding
Publication Date: 2020.12.08 MICROSOFT TECHNOLOGY LICENSING LLC
  • US10862513B2 patent drawing
  • US10862513B2 patent drawing
  • US10862513B2 patent drawing

AI summary

A highly programmable device, referred to generally as a data processing unit, having multiple processing units for processing streams of information, such as network packets or storage packets, is described. The data processing unit includes one or more specialized hardware accelerators configured to perform acceleration for various data-processing functions. This disclosure describes a parallel decoding of codewords within input data stream based on a codeword type and position.