Parallel Combinatorial Design Using In-Memory Vector Processing
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Solution Overview
Problem
Generating and checking all possible combinations in combinatorial design, especially for large sets like the DOBBLE card game, requires significant computing power due to the vast number of combinations, making it inefficient.
Innovation Solution
A system utilizing an in-memory vector processor with a seed generator, Cspan generator, and rule checker to parallelize the generation and search for combinations, reducing the need for external memory access and enhancing efficiency by using sparse sequence encoding and recursive seed generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all possible combinations are generated and checked using traditional computing methods, then complete combinatorial design can be achieved, but computing power consumption and time requirements become excessively high
Solution Approach 1:
The patent segments the combination generation process into independent parallel threads, where each thread generates combinations from different seeds simultaneously. This divides the massive computational task into manageable chunks that can be processed in parallel, reducing overall computing power requirements while maintaining completeness.
Solution Approach 2:
The patent transitions from sequential combination generation to parallel processing by introducing a new dimension of concurrency. Multiple combinations are generated and checked simultaneously across multiple processing threads rather than one after another, dramatically improving efficiency and reducing energy consumption per combination.
2Reliability
If all possible combinations are generated and checked using traditional computing methods, then complete combinatorial design can be achieved, but processing time becomes excessively long
Solution Approach 1:
The patent divides the combination generation task into multiple independent segments that can be processed in parallel. Each processing thread handles a subset of combinations generated from different seeds, allowing simultaneous execution and significantly reducing total processing time while ensuring all combinations are eventually checked.
Solution Approach 2:
The patent implements continuous parallel processing where multiple threads continuously generate and check combinations without idle waiting time. The system maintains full utilization of computing resources by keeping all processing threads actively working on different combination sets simultaneously, maximizing throughput and minimizing processing time.
3Quantity of substance
If traditional memory access methods are used for combination storage and retrieval, then data can be stored externally, but access time and energy consumption increase
Solution Approach 1:
The patent merges the storage and processing functions by implementing an in-memory vector processor where combination data is stored directly in vector registers within the processing unit. This eliminates the need for repeated data transfer between external memory and processor, reducing access time and energy consumption while maintaining full storage capacity for the combination sets.
Data Source
AI summary
A system for parallel combinatorial design includes a processor, an in-memory vector processor and a storage unit. The processor includes a seed generator, a Cspan generator and a rule checker. The seed generator generates at least one seed to generate combinations of length N, defining a space of N choices of which M choices are to be selected. The Cspan generator generates at least one combination from the at least one seed and stores each combination in a separate column of the in-memory vector processor. The rule checker performs a parallel search at least in the in-memory vector processor for combinations which satisfy a rule and the storage unit receives search results of the rule checker from the in-memory vector processor.