Parallel Data Compression Circuit for Speed-Ratio Balance
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Solution Overview
Problem
Data compression acceleration methods often result in a decrease in compression ratio, which affects the efficiency of data storage and transfer in communication and storage devices.
Innovation Solution
A data processing system that includes a memory controller with a data compression circuit capable of processing data blocks by generating hash keys, using interleaved buffer memories for parallel processing of reference data blocks, and determining whether to compress or bypass data blocks based on matching patterns, thereby maintaining a high compression ratio during acceleration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data compression acceleration methods are used, then data compression speed is improved, but compression ratio decreases
Solution Approach 1:
The patent divides the data compression process into multiple parallel segments using multiple buffer memories (first buffer memory, second buffer memory, third buffer memory, fourth buffer memory) that operate simultaneously on different data blocks. This segmentation enables parallel processing which accelerates compression speed while maintaining thorough pattern matching to preserve compression ratio.
Solution Approach 2:
The patent extends the reference block comparison into multiple dimensions by storing reference data blocks across four separate buffer memories and using circular buffer structures with wrap-around addressing. This multi-dimensional approach allows comprehensive pattern matching across extended reference ranges without sacrificing compression ratio while enabling parallel processing for speed.
2Productivity
If parallel processing is used to accelerate compression, then processing speed is improved, but system complexity increases
Solution Approach 1:
The patent employs multiple buffer memories that serve dual purposes: they store both current data blocks being processed and reference data blocks for pattern matching. This multi-functionality reduces the need for separate dedicated storage structures, simplifying the overall system architecture while enabling parallel processing.
Solution Approach 2:
The patent pre-loads reference data blocks into the buffer memories before the main compression processing begins. This preliminary action ensures that reference data is readily available for parallel comparison operations, eliminating the need for complex real-time data retrieval mechanisms during compression.
3Quantity of substance
If extended reference blocks are used for compression, then compression ratio is improved, but processing time increases
Solution Approach 1:
The patent implements continuous parallel processing where multiple buffer memories operate simultaneously on different data blocks throughout the compression process. This continuity ensures that extended reference block comparisons are performed in parallel rather than sequentially, maintaining high compression ratio without proportionally increasing processing time.
Solution Approach 2:
The patent uses circular buffer structures with periodic wrap-around addressing, allowing reference data blocks to be accessed in a periodic manner that enables efficient parallel comparison. This periodic access pattern maintains high compression ratio by examining extended reference ranges while controlling processing time through structured periodic operations.
Data Source
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AI summary
A data compression method includes receiving an input data stream including a previous data block and a current data block, and executing a first comparison of a part of the previous data block with part of a previous reference data block, and a second comparison of the current data block with a current reference data block, where the first and second comparisons are executed in parallel. The method further includes selectively, based on results of the first and second comparisons, outputting the current data block or compressing an extended data block, where the extended data block includes the part of the previous data block and the current data block.