Parallel Computation Pipeline Configuration for FPGA Throughput

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Solution Overview

Problem

FPGAs are more expensive and less efficient than ASICs, despite offering reconfigurability, and existing methods for distributing computations in parallel processing environments often result in excessive synchronization and communication dependencies among computation units.

Innovation Solution

A method for configuring a system of interconnected computation units by identifying instruction subsets, determining dependencies, and associating them to form a pipeline, which reduces cyclic communication dependencies and enables efficient data communication through an interconnection network.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If computations are distributed across multiple computation units in a parallel processing environment, then productivity is improved, but device complexity increases due to synchronization requirements

Engineering Contradiction:
Improvecomputation throughputVSAvoidsynchronization overhead
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The computation is divided into distinct instruction subsets that are assigned to different computation units. Each computation unit processes a specific segment of the computation independently, reducing the need for synchronization between units while maintaining overall productivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instruction subsets are pre-analyzed and assigned to computation units before execution begins. Dependency relationships are identified in advance, allowing the system to establish a predetermined execution plan that minimizes runtime synchronization requirements.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If instruction subsets are assigned to different computation units to form a pipeline, then productivity is improved, but difficulty of detecting and measuring increases due to communication dependencies

Engineering Contradiction:
Improvecomputation throughputVSAvoidcommunication dependency analysis
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The system performs preliminary analysis of instruction dependencies and communication requirements before assigning instruction subsets to computation units. This pre-characterization of communication patterns simplifies the detection and measurement of dependencies during actual execution.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary layer that manages communication between computation units. This intermediary handles the complexity of communication dependencies, making it easier to detect and measure actual data flows without directly analyzing complex inter-unit communications.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If existing methods are used to distribute computations in parallel processing environments, then adaptability is improved, but loss of time increases due to excessive synchronization

Engineering Contradiction:
ImprovereconfigurabilityVSAvoidsynchronization overhead
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

By segmenting computations into independent instruction subsets that can be assigned to different computation units, the system reduces synchronization points while maintaining the ability to reconfigure computation distributions. This segmentation allows adaptable parallel execution with minimal time loss.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically assigns instruction subsets to computation units based on identified dependencies and available resources. This dynamic assignment optimizes the balance between adaptability and synchronization overhead, allowing the system to reconfigure computations efficiently without excessive time loss.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8250507B1Distributing computations in a parallel processing environment
Publication Date: 2012.08.21 MASSACHUSETTS INST OF TECH
  • US8250507B1 patent drawing
  • US8250507B1 patent drawing
  • US8250507B1 patent drawing

AI summary

A system comprises a plurality of computation units interconnected by an interconnection network. A method for configuring the system comprises accepting a set of instructions corresponding to a portion of a program that performs a computation repeatedly; identifying subsets of the instructions; and associating each subset with a different one of the computation units to form a specification of the set of instructions such that execution according to the specification forms a pipeline among at least some of the computation units.