Parallel Computer FFT Overlap Architecture
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Solution Overview
Problem
Existing FFT operations on parallel computers are not performed efficiently due to ineffective methods for repeating FFT operations and data communication, leading to insufficient speed in processing input data.
Innovation Solution
A parallel computer architecture that includes a memory with multiple storage areas and a processor performing FFT operations by overlapping data transmission and reception processes across nodes, utilizing a procedure that involves transposition, transmission, and FFT processing in streams to achieve high-speed FFT operations while minimizing memory consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If FFT operations and data communication are performed sequentially by individual processors, then each processor can complete its calculation task, but the overall processing speed is insufficient and efficiency is low
Solution Approach 1:
The patent implements overlapping execution where FFT operations and data communication proceed simultaneously rather than sequentially. Multiple streams are executed in parallel, with computation and communication interleaved in time, ensuring that processors remain continuously productive without idle waiting periods between calculation and communication phases
Solution Approach 2:
The patent performs data transposition and preparation in advance before the actual FFT computation. By pre-organizing data in the required format and positioning it in appropriate memory locations, the system eliminates setup overhead during the critical computation phase, enabling faster overall processing
2Productivity
If multiple storage areas are allocated for FFT operations and communication, then overlapping computation and communication is enabled, but memory consumption increases
Solution Approach 1:
The patent divides the memory space into multiple distinct storage areas (first storage area for input data, second storage area for intermediate results, third storage area for output data). This segmentation enables different computational streams to operate on different memory regions simultaneously, facilitating overlapping execution while maintaining clear data separation and preventing memory conflicts
Solution Approach 2:
The patent introduces a temporal dimension to memory usage by allocating different storage areas for different time phases of the computation. By organizing memory access in multiple streams across different time intervals, the system achieves parallelism without requiring all data to reside in memory simultaneously, thus reducing peak memory requirements
Data Source
AI summary
A storage unit includes first to third storage areas. An operation unit executes, while executing a first process to perform an FFT (Fast Fourier Transform) operation by using the first storage area, a second process to transmit a calculated FFT calculation result stored in the second storage area to other processes and to store an FFT operation result received from said other processes in the third storage area.