Parallel Computer Initialization via Command Monitoring

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Solution Overview

Problem

In parallel computers, conflicts in accessing shared storage devices during startup lead to longer initialization times, reducing efficiency and ease of use.

Innovation Solution

Implementing a method where one processing unit outputs a read-out request to a storage device, and another processing unit monitors and steals the command, storing it in cache memory to execute the initialization process without direct access, thereby avoiding conflicts and reducing startup time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple processing units directly access the shared storage device during startup, then each processing unit can obtain the initialization program, but access conflicts occur leading to longer initialization time

Engineering Contradiction:
Improveinitialization program loadingVSAvoidinitialization time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent introduces a control circuit as an intermediary between processing units and the shared storage device. The control circuit receives read requests from multiple processing units, manages the reading of the initialization program from storage, and distributes it to requesting processing units, thereby eliminating direct access conflicts while ensuring reliable program delivery.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The control circuit reads the initialization program from the shared storage device once and creates multiple copies to distribute to different processing units. This single read operation is then replicated and distributed in parallel, avoiding multiple conflicting access attempts to the storage device while maintaining program availability for all processing units.

Inventive Principle:
Principle #26Copying

2Object-affected harmful factors

If a control circuit manages the read request from one processing unit, then access conflicts are avoided, but the initialization time increases due to sequential processing

Engineering Contradiction:
Improveaccess conflictVSAvoidinitialization time
Core Design Contradiction:
Object-affected harmful factorsVSLoss of time

Solution Approach 1:

The control circuit maintains continuous operation by immediately initiating the next read operation or distribution task after completing each one. While one processing unit receives the initialization program, the control circuit is already preparing the next program copy or handling subsequent requests, ensuring no idle time and eliminating sequential bottlenecks.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The control circuit automatically manages the entire initialization program distribution process without requiring intervention from individual processing units. It autonomously receives requests, coordinates with the storage device, distributes programs, and handles conflicts, allowing processing units to simply execute their initialization routines independently and simultaneously.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9965290B2Parallel computer, initialization method of parallel computer, and non-transitory medium for storing a program
Publication Date: 2018.05.08 FUJITSU LTD
  • US9965290B2 patent drawing
  • US9965290B2 patent drawing
  • US9965290B2 patent drawing

AI summary

A parallel computer includes a first processor, a second processor, and a first storage device. The first processor outputs, in response to an instruction for starting up the parallel computer, a first read-out request causing the first storage device to transmit a command of an initialization process to the first processor. The first processor executes the initialization process of the first processor by using the command received from the first storage device. The second processor monitors, in response to the instruction for starting up the parallel computer, a signal transmitted between the first processor and the first storage device. The second processor detects, from the signal monitored, the command output from the first storage device. And, the second processor is configured to execute the initialization process of the second processor by using the detected command.