Parallel Computing Nodes Using Dual Virtual Channels
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Solution Overview
Problem
In parallel computing systems, maintaining a regular communication pattern is challenging due to the introduction of input-output nodes, which disrupts the symmetry of ring and torus networks, leading to inefficiencies and increased hardware costs.
Innovation Solution
A parallel computing system design that connects computing nodes and input-output nodes using a single ring or torus network with dual virtual channels, where the first virtual channel is exclusive for communication between nodes and the second virtual channel acts as a virtual channel change line to prevent deadlocks and maintain symmetry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If input-output nodes are attached to computing nodes in a ring network, then data input-output capability is improved, but network symmetry is disrupted and computing efficiency deteriorates
Solution Approach 1:
The patent segments the communication channel into two independent virtual channels (first virtual channel for node-to-node communication, second virtual channel for node-to-input-output-node communication). This segmentation allows computing nodes to maintain symmetric regular communication patterns while input-output nodes can perform input-output operations, resolving the conflict between input-output capability and computing efficiency.
Solution Approach 2:
The patent introduces virtual channels as intermediary structures that mediate between computing nodes and input-output nodes. The first virtual channel handles communication between computing nodes, while the second virtual channel handles communication between computing nodes and input-output nodes, allowing the system to maintain symmetry while providing input-output functionality.
2Adaptability or versatility
If input-output nodes are attached to computing nodes, then data input-output capability is improved, but deadlocks occur in the network
Solution Approach 1:
By segmenting the communication into two separate virtual channels with distinct routing rules, the patent eliminates deadlock conditions. The first virtual channel uses one routing rule for node-to-node communication, while the second virtual channel uses a different routing rule for node-to-input-output-node communication, preventing circular wait conditions that cause deadlocks.
Solution Approach 2:
The patent applies asymmetric routing rules to the two virtual channels: the first virtual channel follows one routing pattern while the second virtual channel follows a different routing pattern. This asymmetry in routing rules prevents deadlocks by ensuring that messages traveling through different channels do not create circular dependencies.
3Productivity
If dual virtual channels are implemented, then communication efficiency is improved, but hardware complexity increases
Solution Approach 1:
The patent implements virtual channels by copying the communication infrastructure (channels and routing logic) rather than adding physical hardware. The first and second virtual channels are software-defined layers that multiplex over the physical network infrastructure, achieving improved communication efficiency without proportionally increasing hardware complexity.
Data Source
AI summary
A parallel computing system includes: each computing node including: a first channel receiving data which a preceding node transfers, and transferring received data to a subsequent node; a second channel receiving data which a preceding node transfers, and transferring received data to a subsequent node; and a computational processor receiving data which the first or second channel has received, and transferring processed data to a subsequent node; an input-output node including: a third channel receiving data which the first channel or the computational processor of a preceding node transfers; a fourth channel receiving data which the first channel or the computational processor of a preceding computing node transfers, and transferring the received data to the second channel of a subsequent computing node; and an input-output processor receiving data which the third channel has received, and transferring inputted and outputted data to the first channel of a subsequent computing node.