Parallel Computing Architecture Non-Greedy Scheduling

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Solution Overview

Problem

In parallel computing architectures, inefficiencies arise when multiple processing units independently complete similar tasks, leading to suboptimal resource utilization and increased memory access overhead, particularly in applications like ray tracing where processing similar work elements in parallel can improve throughput but is hindered by greedy scheduling algorithms.

Innovation Solution

Implementing a non-greedy scheduling algorithm that allows processing units to notify each other when a resource is obtained, enabling other units to prioritize and process work elements associated with the same resource, thereby reducing the need for repeated memory fetches and optimizing resource utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple processing units independently process work elements in parallel, then throughput is improved, but resource utilization deteriorates due to repeated memory fetches

Engineering Contradiction:
ImprovethroughputVSAvoidmemory access overhead
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent merges the scheduling decisions of multiple processing units by implementing a centralized scheduler that coordinates resource allocation across all processing units. When one processing unit obtains a resource from memory, the scheduler notifies other processing units to share the same resource, combining their memory access operations and eliminating redundant fetches.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements a feedback mechanism where processing units notify the centralized scheduler when they obtain resources from memory. The scheduler then uses this feedback information to coordinate subsequent memory access operations across all processing units, allowing them to share recently accessed resources and reduce overall memory traffic.

Inventive Principle:
Principle #23Feedback

2Ease of operation

If a greedy scheduling algorithm is used, then simplicity is maintained, but resource utilization deteriorates due to inability to coordinate between processing units

Engineering Contradiction:
Improvescheduling simplicityVSAvoidresource utilization
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent introduces a centralized scheduler as an intermediary between processing units and memory resources. This mediator coordinates resource allocation by receiving notifications from processing units about obtained resources and distributing this information to other processing units, enabling efficient resource sharing without requiring complex peer-to-peer coordination among processing units.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If processing units fetch resources independently from main memory, then autonomy is maintained, but access time increases due to lack of caching coordination

Engineering Contradiction:
Improveprocessing autonomyVSAvoidresource access time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent implements preliminary action by having the centralized scheduler track and cache resource locations before processing units need them. When a processing unit obtains a resource, the scheduler records this information and proactively notifies other processing units that may need the same resource, allowing them to access it faster from the cache rather than fetching from main memory.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3388940B1Parallel computing architecture for use with a non-greedy scheduling algorithm
Publication Date: 2021.09.01 IMAGINATION TECH LTD
  • EP3388940B1 patent drawingFigure 1
  • EP3388940B1 patent drawingFigure 2(A)~2(C)
  • EP3388940B1 patent drawingFigure 3

AI summary

Methods and architectures for coordinating the operation of a plurality of processing units in a parallel computing architecture wherein each processing unit is configured to process work elements of dynamically generated work groups using a resource (e.g. memory) associated with the work group. The method includes requesting a resource (associated with one of the work groups) from a main storage for use by a first processing unit which causes the resource to be stored in a temporary storage (e.g. cache); transmitting a notification message to a scheduling unit associated with a second processing unit indicating that the resource has been requested; in response to receiving the notification message at the scheduling unit associated with the second processing unit, determining whether a pool of pending work associated with the second processing unit comprises a pending work group associated with the resource; and if so, prioritizing processing of that work group by the second processing unit so as to obtain the resource from the temporary storage.