Parallel Coupling Bus Selection for Semiconductor Power Reduction
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Solution Overview
Problem
Semiconductor devices, particularly phase change memory devices, face high power consumption due to frequent charging and discharging of signal lines during data transfer, which increases energy usage and noise in the signal lines.
Innovation Solution
The implementation of multiple coupling buses in parallel, where each bus stores transferred data, and the selection of a bus with a smaller number of signal lines that need to be charged or discharged during data transfer, reduces power consumption and noise by minimizing the number of signal lines involved in data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If data is transferred using a single bus, then the device complexity is low, but the power consumption increases due to frequent charging and discharging of signal lines
Solution Approach 1:
The patent divides the single data transfer path into multiple parallel buses (first bus and second bus). Each bus can independently transfer data, allowing the system to select which bus to use based on the data pattern. This segmentation reduces power consumption by choosing the bus that requires fewer signal line transitions, while the overall device complexity remains manageable through structured design.
2Use of energy by moving object
If multiple coupling buses are used in parallel, then the power consumption is reduced, but the device complexity increases
Solution Approach 1:
The patent implements dynamic selection between the first and second buses based on the data transfer requirements. The system dynamically determines which bus to use by analyzing the data pattern and selecting the bus that minimizes signal line transitions. This dynamic approach allows the system to adapt to different data scenarios, reducing average power consumption while managing complexity through intelligent control logic.
3Object-affected harmful factors
If signal lines are frequently charged and discharged, then the data transfer speed is maintained, but the noise in signal lines increases
Solution Approach 1:
The patent performs preliminary analysis of the data transfer requirements before actually transferring data. By examining the data pattern in advance, the system determines which bus will require fewer signal line transitions and selects that bus beforehand. This preliminary action prevents unnecessary signal line charging and discharging, thereby reducing noise generation while maintaining efficient data transfer speed.
Data Source
AI summary
According to one embodiment, a device includes first lines transmitting a first signals; second lines receiving the first signals; and a first circuit including a first selector coupled to the first lines, a second selector coupled to the second lines, third lines and a fourth lines between the first and second selectors. Each of the third lines stores the second signals, each of the fourth lines stores the third signals. The first circuit counts a first number of second signals equivalent to the corresponding first signal; counts a second number of third signals equivalent to corresponding first signal of the first signals; and couples either the third or the fourth lines to the first and second lines via the first and second selectors, based on a result of comparison between the first and the second numbers.