Parallel CRC Code Generation for Partial Message Patching
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Solution Overview
Problem
Existing cyclic redundancy check (CRC) code generation methods, particularly using linear feedback shift registers (LFSR), are limited in high-speed network switches and routers due to constraints on internal interface width and clock rates, requiring regeneration of the entire CRC code when only a few message bytes are modified, which consumes significant processing bandwidth.
Innovation Solution
Implementing CRC code generation and checking using the superposition principle, allowing partial message patching without regenerating the entire CRC code, and supporting wider data buses with a fixed logic tree depth, thereby enhancing performance in high-speed network switches and routers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If LFSR is used for CRC code generation, then the implementation is simple, but the internal interface width and clock rates are limited
Solution Approach 1:
The patent divides the message into multiple segments and computes CRC codes for each segment independently using separate LFSR units. This segmentation allows parallel processing of multiple segments simultaneously, thereby increasing the effective processing speed and interface width without complicating the individual LFSR implementation.
Solution Approach 2:
The patent combines multiple LFSR units to process different segments of the message in parallel. By merging the outputs of these parallel LFSR units through a combination network, the system achieves higher effective interface width and processing speed while each individual LFSR unit remains simple to implement.
2Device complexity
If LFSR is used for CRC code generation, then the structure is compact, but regenerating entire CRC code consumes significant processing bandwidth when only a few bytes are modified
Solution Approach 1:
The message is divided into multiple segments, each processed by a separate LFSR unit. When only a few bytes are modified, only the affected segment(s) need to be reprocessed rather than regenerating the entire CRC code. This segmentation dramatically reduces processing bandwidth consumption while maintaining a relatively compact structure through the use of multiple simple LFSR units.
Solution Approach 2:
Instead of regenerating the entire CRC code when data is modified, the system performs partial action by recomputing only the CRC for the affected segment(s). This partial action approach significantly reduces the processing bandwidth required while maintaining error detection integrity.
3Speed
If wider data buses are supported, then higher terabit-per-second speeds are achieved, but LFSR implementations cannot scale with interface width
Solution Approach 1:
The patent segments the wide data bus into multiple narrower channels, each processed by a separate LFSR unit. This segmentation allows the system to support wider data buses and higher speeds by simply adding more parallel LFSR units, providing scalability with interface width without increasing the complexity of individual processing units.
Solution Approach 2:
The patent creates a universal CRC processing architecture where multiple identical LFSR units can handle different segment widths and configurations. This multi-functional design allows the same basic LFSR structure to scale with interface width by adjusting the number of parallel units, providing adaptability to different speed and width requirements.
Data Source
AI summary
Systems and methods are provided for fast cyclic redundancy check code generation. For example, a method includes representing the sequence of bits as a polynomial over a Galois field base 2; partitioning the polynomial into a plurality of partial polynomials, wherein the polynomial equals the sum of the partial polynomials; concurrently generating a respective partial CRC code for each of the partial polynomials; weighting each partial CRC code according to a position of the respective partial polynomial in the polynomial; and summing the weighted partial CRC codes.