Parallel Capacitive-Resistive DAC Circuit for Continuous Bandwidth
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Solution Overview
Problem
Existing digital-to-analog converters (DACs) face limitations in bandwidth due to frequency range suppression when capacitive voltage division DACs drive resistive loads, leading to inadequate signal generation in certain frequency ranges.
Innovation Solution
A digital-to-analog conversion circuit comprising a first capacitive voltage division DAC and a second resistive voltage division or switched current DAC, connected in parallel, to create a common RC load that provides a continuous passband, overcoming bandwidth limitations by combining their frequency characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a capacitive voltage division DAC is used to achieve high-speed operation, then bandwidth is improved, but frequency range suppression occurs when driving resistive loads
Solution Approach 1:
The patent combines a capacitive voltage division DAC and a resistive voltage division DAC in parallel configuration. The capacitive DAC provides high-speed operation for high-frequency components, while the resistive DAC ensures adequate signal generation for low-frequency components. Their outputs are summed to produce a complete analog signal across the full frequency range, resolving the frequency suppression issue.
2Reliability
If a resistive voltage division DAC is used to ensure adequate low-frequency signal generation, then frequency range coverage is improved, but high-frequency performance is limited
Solution Approach 1:
The patent combines a capacitive voltage division DAC and a resistive voltage division DAC in parallel configuration. The capacitive DAC provides high-speed operation for high-frequency components, while the resistive DAC ensures adequate signal generation for low-frequency components. Their outputs are summed to produce a complete analog signal across the full frequency range, resolving the frequency suppression issue.
Solution Approach 2:
The patent assigns different functional characteristics to different parts of the system: the capacitive DAC is optimized for high-frequency performance while the resistive DAC is optimized for low-frequency performance. This local specialization allows each DAC to excel in its designated frequency range, and their combined output provides comprehensive frequency coverage.
3Ease of manufacture
If a single DAC architecture is used to simplify device complexity, then ease of manufacture is improved, but bandwidth extension is limited
Solution Approach 1:
The patent combines a capacitive voltage division DAC and a resistive voltage division DAC in parallel configuration. The capacitive DAC provides high-speed operation for high-frequency components, while the resistive DAC ensures adequate signal generation for low-frequency components. Their outputs are summed to produce a complete analog signal across the full frequency range, resolving the frequency suppression issue.
Data Source
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AI summary
A digital-to-analog conversion circuit (60) for converting a digital input sequence to an analog representation is disclosed. It comprises a first DAC, (100) wherein the first DAC (100) is of a capacitive voltage division type having a capacitive load (110). Furthermore, it comprises a second DAC (120) having a resistive load (130). An output (104) of the first DAC (100) and an output (124) of the second DAC (120) are connected, such that said capacitive load (110) and said resistive load (130) are connected in parallel.