Parallel DAC Core Architecture for Higher Monotonicity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Digital-to-Analog Converters (DACs) often suffer from non-monotonicity, where changes in the digital input do not result in similar changes in the analog output, leading to reduced accuracy in representing digital inputs as analog outputs.
Innovation Solution
The method involves connecting multiple identical DAC cores in parallel and providing each core with a modified digital signal based on the user's digital input, thereby enhancing monotonicity and resolution of the analog output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple identical DAC cores are connected in parallel with different digital signals, then monotonicity is improved, but device complexity increases
Solution Approach 1:
The patent divides a high-resolution DAC into multiple identical lower-resolution DAC cores connected in parallel. Each core processes a portion of the digital input signal, and their analog outputs are combined to achieve the desired high monotonicity performance without requiring a single complex high-resolution core.
Solution Approach 2:
The patent combines the analog outputs of multiple identical DAC cores to produce the final high-resolution analog output. By merging the outputs of several cores that each provide M bits of monotonicity, the system achieves P bits of monotonicity where P > M, resolving the contradiction between improved monotonicity and device complexity.
2Measurement precision
If multiple identical DAC cores are connected in parallel, then resolution is improved, but device complexity increases
Solution Approach 1:
The patent segments a high-resolution DAC into multiple identical lower-resolution DAC cores. Each core is designed with simpler circuitry providing M bits of monotonicity, and when combined in parallel with appropriate digital signal distribution, they achieve P bits of monotonicity (P > M), improving resolution while keeping individual core complexity manageable.
Solution Approach 2:
The patent changes the operational parameters of multiple DAC cores by providing different digital input signals to each core based on the user's digital input. This parameter variation allows the parallel combination to achieve higher effective resolution than any single core could provide alone.
3Measurement precision
If DAC cores are configured to receive inputs with more bits than designed, then monotonicity is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent implements preliminary overflow detection and handling logic that identifies when a DAC core would receive more bits than it is configured to accept. By detecting potential overflow conditions in advance and managing them through the parallel core architecture, the system achieves higher monotonicity while controlling manufacturing precision requirements through design rather than relying solely on high-precision manufacturing.
Data Source
AI summary
The present disclosure relates to a method of controlling a digital-to-analog converter, DAC, system. The DAC system includes a plurality of DAC cores connected in parallel with the outputs of the DAC cores coupled so as to provide a combined analog output. Each DAC core receives a digital signal which is a modified version of a digital input provided to the DAC system. By providing modified digital signals to the DAC cores and using a plurality of DAC cores, the monotonicity of the DAC system may be improved.