Interleaved Parallel DCDC Converter for PA Drain Voltage Control
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Solution Overview
Problem
Conventional power supply circuits for wireless communication systems face challenges in providing high-speed drain voltage to power amplifiers efficiently, leading to increased switching loss and electromagnetic interference due to spatial design constraints and large parasitic inductance characteristics of components.
Innovation Solution
A multi-parallel resonance type converter is proposed, comprising DCDC converter circuits arranged in parallel with a PWM controller, each including a transformer, primary active clamping circuit, and secondary resonance converter circuit with a diode for regeneration current, to minimize switching loss and electromagnetic interference by interleaving PWM control signals across channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional power supply circuits are used for power amplifiers, then the circuit can provide drain voltage, but switching loss and electromagnetic interference increase due to spatial design constraints and large parasitic inductance
Solution Approach 1:
The patent divides the power supply circuit into multiple parallel DCDC converter circuits instead of using a single converter. This segmentation reduces the current burden on each individual circuit, allows for optimized component sizing, and reduces parasitic inductance by distributing the power delivery paths. The segmented architecture enables better spatial utilization and reduces electromagnetic interference through distributed switching events.
Solution Approach 2:
The patent transitions from a single-channel power supply to a multi-parallel power supply architecture, adding the dimension of parallelism. This dimensional change allows simultaneous operation of multiple converters with interleaved PWM control, effectively reducing switching loss by distributing switching events across time and space, while also reducing parasitic inductance through multiple parallel current paths.
2Object-affected harmful factors
If conventional power supply circuits are used for power amplifiers, then the circuit can provide drain voltage, but electromagnetic interference increases due to large parasitic inductance characteristics
Solution Approach 1:
By segmenting the power supply into multiple parallel DCDC converters, the patent reduces the current magnitude through each individual circuit path. This segmentation directly reduces parasitic inductance effects (since voltage drop due to parasitic inductance is proportional to di/dt and current magnitude) and distributes electromagnetic interference sources across multiple spatial locations, reducing overall EMI.
Solution Approach 2:
The patent implements interleaved PWM control where multiple DCDC converters operate with phase-shifted periodic switching. This periodic action with phase distribution spreads out the switching events in time, reducing peak electromagnetic interference and allowing each converter to operate at optimized switching frequencies that minimize parasitic inductance effects.
3Loss of energy
If multi-parallel DCDC converter circuits are used, then switching loss and electromagnetic interference are reduced, but the device complexity increases
Solution Approach 1:
The patent merges multiple DCDC converter circuits into a unified multi-parallel power supply system with centralized PWM control. While individual converter circuits are added, they are integrated through common control logic and coordinated operation, which optimizes overall system performance. The merging approach allows shared components and coordinated switching that reduces total switching loss compared to independent converters.
Solution Approach 2:
The patent changes key operating parameters including switching frequency, duty cycle, and phase relationships of the parallel converters to optimize performance. By adjusting these parameters, the system achieves reduced switching loss and minimized parasitic inductance effects. The parameter optimization compensates for the increased complexity by extracting maximum efficiency from the multi-parallel architecture.
4Speed
If multi-parallel DCDC converter circuits with interleaved PWM control are used, then high-speed response performance is achieved, but control complexity increases
Solution Approach 1:
The patent uses periodic PWM control signals with specific duty cycles and phase shifts for each parallel DCDC converter. This periodic action enables high-speed response by allowing coordinated switching of multiple converters, where each operates at optimized frequency but collectively provides fast transient response. The phase-shifted periodic control distributes switching stress and enables faster overall system response.
Solution Approach 2:
The patent implements feedback control mechanisms where the PWM controller monitors output conditions and adjusts the PWM signals to multiple DCDC converters in real-time. This feedback enables high-speed response to load changes by dynamically optimizing the operation of each parallel converter. The feedback loop compensates for the increased control complexity by providing adaptive coordination that maximizes response speed while maintaining stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables efficient space utilization and high-speed response performance, reducing switching loss and electromagnetic interference while providing optimal drain voltage to power amplifiers, thus enhancing the overall efficiency and reducing spatial constraints of the power supply circuit.
Implementation Method 1
Each DCDC converter circuit may include a transformer, a primary active clamping circuit connected to a primary end of the transformer, and a secondary resonance converter circuit connected to a secondary end of the transformer
Implementation Method 2
The secondary resonance converter circuit may comprise a diode configured to provide a regeneration current from the secondary end of the transformer to an output end of the secondary resonance converter circuit
Data Source
AI summary
In embodiments, a power supply circuit is provided. The power supply circuit may comprise a plurality of direct current direct current (DCDC) converter circuits and a pulse width modulation (PWM) controller operatively connected to the plurality of DCDC converter circuits. The PWM controller may be configured to obtain a current voltage of a power amplifier. The PWM controller may be configured to obtain a reference voltage for the power amplifier. The PWM controller may be configured to generate PWM control signals for the plurality of DCDC converter circuits based on a difference between the current voltage and the reference voltage. The PWM controller may be configured to provide the PWM control signals to the plurality of DCDC converter circuits. Each DCDC converter circuit of the plurality of DCDC converter circuits may comprise a transformer, a primary active clamping circuit connected to a primary end of the transformer, and a secondary resonance converter circuit connected to a secondary end of the transformer. The secondary resonance converter circuit may comprise a diode configured to provide a regeneration current from the secondary end of the transformer to an output end of the secondary resonance converter circuit.