Parallel Delta-Sigma DAC for High-Bandwidth, High-Resolution Output

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Solution Overview

Problem

Conventional digital-to-analog converters face limitations in achieving high instantaneous bandwidth and resolution due to issues like quantization noise, sampling jitter, thermal noise, and component mismatches, especially at very high sampling rates.

Innovation Solution

The proposed solution involves a discrete-time noise-shaping/quantization circuit with multiple parallel processing paths and a multiplexer to convert high-rate, parallel inputs into a serial output, along with a multi-bit-to-variable-level signal converter and an analog bandpass filter, which operates at a subsampling rate significantly lower than the input signal sampling rate, allowing for improved noise shaping and resolution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional DAC structures (resistor ladder networks or switched current sources) are used, then the converter can operate at high sampling rates, but the resolution is limited by quantization noise, distortion, and thermal noise

Engineering Contradiction:
Improvesampling rateVSAvoidconversion resolution
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The converter is divided into multiple parallel processing paths (first path with first converter, second path with second converter). Each path processes a portion of the input signal at a lower sampling rate, which reduces quantization noise and improves resolution in each path. The parallel structure allows the system to maintain high effective sampling rate while achieving high resolution through noise shaping and dithering techniques in each individual path.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the operating parameters of the parallel converter paths by assigning different sampling rates to different paths. The first converter operates at a first sampling rate while the second converter operates at a second sampling rate. This parameter differentiation allows optimization of each path for specific performance characteristics, with dithering signals added to control quantization noise and improve overall resolution.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the sampling rate is increased to approach the Nyquist limit, then the instantaneous bandwidth is improved, but quantization noise and sampling jitter increase

Engineering Contradiction:
Improveinstantaneous bandwidthVSAvoidquantization noise
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The high-rate input signal is divided into multiple parallel processing paths, each operating at a lower sampling rate. This segmentation reduces the quantization noise burden on each individual converter path. The first converter path and second converter path each handle a portion of the signal spectrum, allowing dithering and noise shaping to be applied effectively in each path to suppress quantization noise while maintaining high overall instantaneous bandwidth.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Dithering signals are introduced as intermediary elements in each converter path. These dithering signals are added to the input of each converter to randomize quantization errors and convert deterministic quantization noise into stochastic noise that can be filtered more effectively. This intermediary dithering mechanism allows the system to achieve high instantaneous bandwidth while controlling the harmful effects of quantization noise.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If high-resolution conversion is achieved using fine granularity rounding operations, then the conversion resolution is improved, but the instantaneous bandwidth is limited to a few gigahertz or less

Engineering Contradiction:
Improveconversion resolutionVSAvoidinstantaneous bandwidth
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The invention segments the high-resolution conversion task across multiple parallel converter paths operating at different sampling rates. The first converter and second converter each perform rounding operations with appropriate granularity for their respective sampling rates. By distributing the conversion workload across parallel paths with different operating parameters, the system achieves high effective resolution while maintaining high instantaneous bandwidth that would be impossible for a single conventional converter.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from a single-dimension approach (single converter operating at one sampling rate) to a multi-dimensional approach with parallel converter paths operating at different sampling rates. This dimensional expansion in the sampling rate space allows the system to simultaneously achieve high resolution through fine granularity conversion in each path while maintaining high instantaneous bandwidth through the parallel structure and different sampling rate assignments.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9680497B2Conversion of a discrete-time quantized signal into a continuous-time, continuously variable signal
Publication Date: 2017.06.13 PAGNANELLI FAMILY TRUST
  • US9680497B2 patent drawing
  • US9680497B2 patent drawing
  • US9680497B2 patent drawing

AI summary

Provided are, among other things, systems, apparatuses, methods and techniques for converting a discrete-time quantized signal into a continuous-time, continuously variable signal. An exemplary converter preferably includes: (1) multiple oversampling converters, each processing a different frequency band, operated in parallel; (2) multirate (i.e., polyphase) delta-sigma modulators (preferably second-order or higher); (3) multi-bit quantizers; (4) multi-bit-to-variable-level signal converters, such as resistor ladder networks or current source networks; (5) adaptive nonlinear, bit-mapping to compensate for mismatches in the multi-bit-to-variable-level signal converters (e.g., by mimicking such mismatches and then shifting the resulting noise to a frequently range where it will be filtered out by a corresponding bandpass (reconstruction) filter); (6) multi-band (e.g., programmable noise-transfer-function response) bandpass delta-sigma modulators; and/or (7) a digital pre-distortion linearizer (DPL) for canceling noise and distortion introduced by an analog signal bandpass (reconstruction) filter bank.