Parallel Dequeue Processing Engines for Linked List Bottlenecks
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Solution Overview
Problem
The existing data dequeuing process in communications chips is inefficient due to sequential dependency from the front to the back of linked list nodes, which restricts dequeue performance.
Innovation Solution
Implementing multiple dequeue processing engines that operate in parallel to dequeue packets from multiple queues based on obtained storage addresses, allowing concurrent processing and improved efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If sequential dequeue processing is used to maintain simplicity of operation, then ease of operation is improved, but productivity deteriorates due to front-to-back dependency restricting dequeue performance
Solution Approach 1:
The dequeue operation is segmented into independent processing units (dequeue processing engines) that can operate simultaneously on different packets. Each engine handles a portion of the dequeue task independently, eliminating the sequential dependency while maintaining operational simplicity through standardized engine behavior.
Solution Approach 2:
The patent transitions from one-dimensional sequential processing to multi-dimensional parallel processing by introducing multiple dequeue processing engines operating concurrently. This dimensional expansion allows simultaneous access to linked list nodes from multiple starting points, breaking the front-to-back dependency constraint.
2Productivity
If multiple dequeue processing engines are used to improve productivity, then dequeue efficiency is improved, but device complexity increases
Solution Approach 1:
Multiple dequeue processing engines are designed with identical universal functionality, each capable of performing the complete dequeue operation independently. This universality allows the system to scale productivity by simply replicating the same functional unit rather than designing increasingly complex specialized processors.
Solution Approach 2:
The patent implements parallelism by creating copies of the dequeue processing engine rather than designing a single complex processor. Each engine is a replicated instance that can independently process packets, reducing the complexity of individual units while achieving high overall throughput through parallel operation.
3Productivity
If parallel dequeue processing is implemented to enhance productivity, then dequeue efficiency is improved, but ease of operation deteriorates due to increased operational complexity
Solution Approach 1:
The dequeue processing engines operate autonomously, each independently managing its own processing of packet data structures. The engines self-coordinate through the shared memory architecture without requiring complex external control, allowing parallel operation while maintaining operational simplicity.
Data Source
AI summary
A method and apparatus for dequeuing data are disclosed. The method includes: obtaining storage addresses of packets in each queue, and dequeuing, by multiple dequeue processing engines, the packets in each queue in parallel according to the storage addresses of the packets in each queue. Multiple dequeue processing engines dequeue the packets in multiple queues in parallel, and thus the data dequeue efficiency and performance are improved.