Parallel Differential Encoder XOR Interleaving for High Speed Optical DPSK

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Solution Overview

Problem

Conventional differential encoders face latency issues and timing constraints that limit data rates in high-speed communication systems, particularly in optical DPSK systems, where data rates above 15 GHz are difficult to achieve due to feedback latency and timing problems.

Innovation Solution

The solution involves differentially encoding multiple parallel low-rate data streams and interleave them using a feed-forward XOR tree structure, allowing for the creation of a single high-rate differentially encoded data stream, which can achieve data rates beyond conventional limits by utilizing XOR gates with small gate delays and precise tolerances.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If feedback around a flip-flop is used to compare the present input bit with the previous output bit, then differential encoding is achieved, but latency increases and data rate is limited

Engineering Contradiction:
Improvedifferential encoding accuracyVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the single high-speed differential encoding task into multiple parallel lower-speed differential encoding operations. Multiple differential encoders process separate data streams simultaneously at lower rates, and their outputs are combined by XOR gates to produce the final high-speed encoded stream. This segmentation allows each encoder to operate below the latency threshold while achieving high overall data rate.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges multiple parallel differential encoded data streams using XOR gates to create a single high-rate output stream. The XOR combination of multiple lower-rate streams produces an interleaved high-rate stream, effectively combining the throughput of multiple encoders to achieve rates exceeding 15 GHz without the latency penalties of a single high-speed encoder.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If conventional differential encoders are used, then manufacturing is straightforward, but data rates above 15 GHz cannot be achieved

Engineering Contradiction:
Improvedata rateVSAvoidencoder structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the high-speed encoding function into multiple parallel lower-speed encoders. Each encoder operates at a manageable rate (e.g., 7.5 GHz or lower) that is easy to manufacture, while the collective output of multiple encoders, when combined by XOR gates, achieves the desired high data rate (e.g., 15 GHz or higher).

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a single-time-dimensional encoding approach to a multi-dimensional approach by processing multiple data streams in parallel across different temporal slots. The feed-forward interleaving structure distributes bits across multiple time periods, allowing the system to achieve high throughput by combining multiple lower-rate streams rather than pushing a single encoder to high frequencies.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If feedback loop timing is used for differential encoding, then encoding function is achieved, but timing constraints make manufacturing difficult

Engineering Contradiction:
Improveencoding functionVSAvoidtiming control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

Instead of using feedback to achieve differential encoding (the conventional approach), the patent inverts the approach by using feed-forward interleaving with XOR gates. The encoding function is achieved through the interleaved combination of parallel streams rather than through feedback comparison, eliminating the timing-critical feedback path and making manufacturing more tolerant of variations.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS7929640B2High speed differential encoder and interleaver
Publication Date: 2011.04.19 NORTHROP GRUMMAN SYSTEMS CORP
  • US7929640B2 patent drawing
  • US7929640B2 patent drawing
  • US7929640B2 patent drawing

AI summary

A plurality of differential encoders encodes a plurality of parallel data bit streams. XOR gates interleave the outputs of the differential encoders forming a single high speed differentially encoded bit stream with a data rate that is the sum of the data rate of the parallel data bit streams. The high speed data stream provides a single differentially encoded input to a differential phase shift keying modulator that generates symbols for a high speed optical communication system.