Parallel Digital Linear Regulator for CPU Voltage Droop Control
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Solution Overview
Problem
The increasing difficulty in improving system-on-chip (SoC) performance due to rising power consumption, particularly from leakage power, and the impact of virus applications on power delivery, where traditional voltage regulation methods result in higher than necessary input voltage levels leading to increased power dissipation and reduced performance.
Innovation Solution
A power supply architecture that combines a digital linear voltage regulator (D-LVR) in parallel with a motherboard voltage regulator, allowing for dynamic voltage identification and reduction, thereby minimizing the guard bands and optimizing power consumption while maintaining performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a higher than necessary voltage level is selected for input supply voltage to cover wide loading spectrum, then voltage droop is compensated, but package power dissipation increases and performance decreases
Solution Approach 1:
The patent implements dynamic voltage adjustment by introducing a digital linear voltage regulator (DLVR) that continuously monitors load conditions and adjusts the input voltage level in real-time. The DLVR dynamically reduces the input voltage from the conservative high level to a lower optimal level when load conditions permit, thereby reducing power dissipation while maintaining sufficient voltage headroom during transient loading events.
Solution Approach 2:
The patent changes the voltage parameter dynamically based on operating conditions. By using the DLVR to adjust the input voltage level according to actual load demands rather than maintaining a fixed high voltage level, the system optimizes the voltage parameter to minimize power dissipation while ensuring adequate voltage supply during transient events.
2Reliability
If guard bands are increased to account for MB voltage regulator output voltage inaccuracy, then voltage supply reliability is improved, but input voltage supply increases even when realistic peak current is much lower than Imax
Solution Approach 1:
The patent employs feedback mechanisms where the DLVR monitors the actual output voltage from the motherboard voltage regulator and the real-time load conditions. Based on this feedback, the DLVR intelligently adjusts the input voltage level, reducing the need for excessive guard bands while maintaining reliable voltage supply. The feedback loop enables the system to distinguish between actual voltage deficiencies and conservative design margins.
Solution Approach 2:
The DLVR performs self-adjustment of the input voltage level based on monitored conditions, eliminating the need for fixed conservative guard bands. The system serves itself by automatically optimizing the voltage supply according to actual operating conditions, reducing power dissipation while maintaining reliability.
3Power
If maximum current supply Iccmax is increased to account for virus applications, then peak current capability is improved, but power consumption increases due to higher input voltage level
Solution Approach 1:
The patent implements dynamic voltage scaling that adjusts the input voltage level based on actual current demand rather than maintaining a fixed high voltage level designed for maximum virus applications. The DLVR dynamically reduces voltage during normal operation when lower current is drawn, significantly reducing power consumption while maintaining the capability to supply peak current when needed.
Data Source
AI summary
A power supply architecture combines the benefits of a traditional single stage power delivery, when there are no additional power losses in the integrated VR with low VID and low CPU losses of FIVR (fully integrated voltage regulator) and D-LVR (digital linear voltage regulator). The D-LVR is not in series with the main power flow, but in parallel. By placing the digital-LVR in parallel to a primary VR (e.g., motherboard VR), the CPU VID is lowered and the processor core power consumption is lowered. The power supply architecture reduces the guard band for input power supply level, thereby reducing the overall power consumption because the motherboard VR specifications can be relaxed, saving cost and power. The power supply architecture drastically increases the CPU performance at a small extra cost for the silicon and low complexity of tuning.