Parallel Doherty Power Amplifier for Wideband Efficiency
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Solution Overview
Problem
Doherty power amplifiers face limitations in efficiency and bandwidth, particularly under large-bandwidth conditions, due to reduced gain and sensitivity compared to Class AB power amplifiers, which restricts their performance in high-power and ultra-high power applications, especially in 5G mobile communications.
Innovation Solution
A Doherty power amplifier design incorporating multiple parallel carrier and peak power amplifier units, each comprising two power amplifier circuits with medium-low power transistors, allowing for power combination and reduced saturation power, along with phase and impedance adjustments to enhance efficiency and bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If Doherty power amplifier uses Class C peak power amplifier to achieve high efficiency, then efficiency is improved, but gain is reduced by 2 dB to 3 dB
Solution Approach 1:
The patent segments the power amplifier into multiple parallel carrier power amplifiers and peak power amplifiers, each further divided into multiple units with two power amplifier circuits. This segmentation allows the system to achieve high efficiency through the Doherty architecture while compensating for gain loss through parallel configuration and power combination, resolving the contradiction between efficiency improvement and gain reduction.
Solution Approach 2:
The patent merges multiple power amplifier circuits in parallel to perform power combination. By combining the output of multiple carrier power amplifiers and peak power amplifiers, the system recovers the gain lost due to using Class C amplifiers, while maintaining the high efficiency benefit of the Doherty architecture.
2Loss of energy
If Doherty power amplifier adopts multiple paths of Doherty circuits to increase output power and efficiency, then efficiency is improved, but bandwidth is reduced
Solution Approach 1:
The patent applies local quality by using medium-low power amplifier transistors with saturation power less than or equal to a preset threshold in specific positions within the parallel circuits. This localized optimization allows each unit to operate efficiently while the overall system maintains broad bandwidth through parallel configuration, resolving the contradiction between efficiency and bandwidth.
Solution Approach 2:
The patent implements dynamic operation by enabling each carrier power amplifier and peak power amplifier to operate independently based on input signal conditions. The parallel configuration allows dynamic power combination that adapts to different signal levels and frequencies, maintaining both high efficiency and broad bandwidth across varying operating conditions.
3Power
If Doherty power amplifier uses parallel power combination to increase output power, then output power is improved, but device complexity increases
Solution Approach 1:
The patent segments the power amplifier system into modular carrier power amplifiers and peak power amplifiers, each with standardized internal structure of two power amplifier circuits. This segmentation enables scalable parallel configuration to increase output power while maintaining manageable complexity through modular design and repetition of standardized units.
Data Source
AI summary
The present disclosure discloses a Doherty power amplifier, including at least one carrier power amplifier and at least one peak power amplifier connected in parallel, each carrier power amplifier includes at least one carrier power amplifier unit connected in parallel for power combination, and each peak power amplifier includes at least one peak power amplifier unit connected in parallel for power combination, each of the carrier power amplifier unit and the peak power amplifier unit includes two power amplifier circuits connected in parallel for power combination, and each of the two power amplifier circuits includes a medium-low power amplifier transistor having saturation power less than or equal to a preset threshold. The present disclosure further discloses a power amplification method.