Parallel Drift Cancellation in Memory Devices
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Solution Overview
Problem
Memory devices face challenges in efficiently canceling drift in threshold voltage of memory cells over time, which affects the ability to accurately program logic states, leading to power and time consumption issues during access operations.
Innovation Solution
A memory device is configured to perform parallel drift cancellation by applying specific voltage sequences to word lines, allowing concurrent drift cancellation and access operations, reducing the number of voltage toggles required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sequential drift cancellation and access operations are performed, then drift cancellation can be achieved, but power consumption and operation time increase
Solution Approach 1:
The patent combines drift cancellation operations and access operations into a single parallel execution framework. Multiple memory cells are divided into subsets where different subsets undergo drift cancellation and access operations simultaneously, merging what would traditionally be sequential processes into one unified operation that reduces overall power consumption and time.
Solution Approach 2:
The patent segments the memory cells into multiple subsets based on their threshold voltage characteristics. This segmentation allows different subsets to be processed simultaneously with different voltage applications, enabling parallel drift cancellation and access operations that reduce total operation time and power consumption compared to sequential processing.
2Reliability
If sequential drift cancellation and access operations are performed, then drift cancellation can be achieved, but operation time increases
Solution Approach 1:
The patent merges drift cancellation and access operations into parallel execution. By simultaneously performing drift cancellation on one subset of memory cells while performing access operations on another subset, the total operation time is reduced compared to executing these operations sequentially.
Solution Approach 2:
The patent divides memory cells into segments based on their electrical characteristics, allowing different segments to be processed in parallel. This segmentation enables the system to perform drift cancellation and access operations concurrently across different memory cell groups, significantly reducing the overall time required.
3Reliability
If multiple voltage toggles are used for drift cancellation, then drift can be canceled, but device complexity and operation time increase
Solution Approach 1:
The patent applies different voltage sequences to different subsets of memory cells based on their specific threshold voltage characteristics. Rather than using a uniform complex voltage sequence for all cells, each subset receives a tailored voltage sequence that is optimized for its characteristics, reducing overall system complexity while maintaining effective drift cancellation.
Data Source
AI summary
Methods, systems, and devices for parallel drift cancellation are described. In some instances, during a first duration, a first voltage may be applied to a word line to threshold one or more memory cells included in a first subset of memory cells. During a second duration, a second voltage may be applied to the word line to write a first logic state to one or more memory cells included in the first subset and to threshold one or more memory cells included in a second subset of memory cells. During a third duration, a third voltage may be applied to the word line to write a second logic state to one or more memory cells included in the second subset of memory cells.