Parallel Electrode Conductor for Charge Dissipation in 3D Memory Stacks
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Solution Overview
Problem
The manufacturing process of semiconductor memory devices with increasing numbers of electrode layers faces challenges in forming memory holes due to charge buildup and the risk of arc discharge, which complicates the formation of vertical memory holes and decreases throughput.
Innovation Solution
The use of conductors that electrically connect multiple electrode layers in parallel, suppressing charge buildup and preventing arc discharge by using a conductor to connect the electrode layers after stacking, allowing for easier formation of memory holes without modifying the manufacturing process significantly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of stacks of electrode layers is increased to improve memory capacity, then the storage density is improved, but it becomes difficult to form memory holes due to charge buildup and arc discharge risk
Solution Approach 1:
A charge release layer is introduced as an intermediary between the electrode layers and the memory hole formation process. This layer facilitates charge dissipation during etching, preventing charge buildup and arc discharge that would otherwise occur when forming memory holes through thick stacks of electrode layers, thereby enabling successful memory hole formation in high-capacity devices
Solution Approach 2:
The electrical properties of the structure are modified by introducing the charge release layer with specific material characteristics that enable charge dissipation. This changes the electrical parameter profile through the electrode layer stack, allowing charges to be released during the etching process rather than accumulating to dangerous levels that cause arc discharge
2Productivity
If conventional etching is used to form memory holes through multiple electrode layers, then the existing process is maintained, but charge buildup causes arc discharge and decreases throughput
Solution Approach 1:
The charge release layer serves as a mediator that enables safe charge dissipation during etching operations. By providing this intermediate charge dissipation path, the process maintains high throughput while eliminating the reliability risk of arc discharge that would otherwise limit manufacturing
Solution Approach 2:
The charge release layer is prepared in advance during the stacking process, before memory hole formation begins. This preliminary preparation of the charge dissipation path ensures that when etching starts, charges can immediately be released safely, preventing arc discharge and maintaining continuous high-speed manufacturing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the easy formation of memory holes that pierce multiple electrode layers, improving the manufacturing process throughput and allowing the use of metal as electrode layer material, while avoiding arc discharge and charge buildup issues.
Implementation Method 1
a conductor electrically connecting the plurality of second electrode layers to each other
Data Source
AI summary
A semiconductor memory device includes a substrate, a plurality of first electrode layers, a semiconductor layer, a plurality of second electrode layers, and a conductor. The plurality of first electrode layers are arranged to be separated from each other in a first direction above the substrate. The semiconductor layer extends through the plurality of first electrode layers in the first direction. The plurality of second electrode layers are arranged to be separated from each other in the first direction, arranged to be separated from the plurality of first electrode layers in a second direction crossing the first direction, and arranged at substantially the same levels as levels of the plurality of first electrode layers in the first direction. The conductor electrically connects the plurality of second electrode layers to each other. The plurality of second electrode layers are connected in parallel by the conductor.