Parallel Emulation Processor Configuration via Segmented Registers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional systems are inefficient in testing and validating complex computing hardware due to high costs and time requirements, as they cannot effectively and efficiently configure emulation processors to ensure correct and predictable operation.
Innovation Solution
A hardware-accelerated configuration of multiple emulation processors that allows for rapid self-configuration by modifying registers with executable instructions, enabling parallel and distributed processing to reduce configuration time through efficient bulk data transfer and processor-level communication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If conventional systems are used to configure emulation processors, then configuration can be performed with existing tools, but the time required to configure and test computing hardware increases rapidly
Solution Approach 1:
The configuration process is divided into multiple independent configuration records, each containing specific update operations for emulation processors. These segmented configuration records can be processed in parallel, allowing simultaneous configuration of multiple processors rather than sequential configuration, thus reducing total configuration time while maintaining testing efficiency
Solution Approach 2:
Configuration records are prepared and staged in advance before actual emulation processor configuration occurs. The host system generates and queues multiple configuration records with all necessary update operations predetermined, allowing the emulation processors to execute pre-planned configuration sequences in parallel without waiting for real-time instruction generation, thereby reducing configuration time while preserving testing productivity
2Speed
If sequential configuration of emulation processors is used, then system complexity is reduced, but the speed of configuration decreases
Solution Approach 1:
A host system acts as an intermediary between the configuration source and multiple emulation processors. The host generates configuration records, manages their queuing, and distributes them to multiple emulation processors for parallel execution. This intermediary coordinates the parallel configuration process, enabling high-speed configuration of multiple processors while the host manages the overall system complexity rather than requiring complex point-to-point control logic in each processor
3Productivity
If parallel configuration of multiple emulation processors is implemented, then configuration time is reduced, but the complexity of data transfer and coordination increases
Solution Approach 1:
Multiple configuration operations for different emulation processors are merged into a single bulk data transfer operation. The host system packages multiple configuration records containing update operations for multiple processors into one consolidated data transfer, which is then distributed to the respective processors. This merging approach achieves high configuration throughput while simplifying the data transfer mechanism compared to multiple separate transfer operations
Data Source
AI summary
Implementations may include a method of accelerated modification of an emulation processor system, by loading, by a first emulation processor, a first portion of processor instructions into one or more registers of the first emulation processor, in response to a selection of a first programming mode associated with the first emulation processor, and loading, by a second emulation processor operatively coupled with the first emulation processor, a second portion of the processor instructions into one or more registers of the second emulation processor, in response to a selection of a first programming mode associated with the second emulation processor.