Parallel Execution Scenario Generation for Hardware Exception Handling

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Solution Overview

Problem

Managing the execution of computer tasks under time constraints in computer processing systems is challenging due to difficulties in identifying and mitigating hardware exceptions, which can lead to delays and unreliable operations.

Innovation Solution

A computer-implemented method that identifies a computer task, determines a hardware exception source, an exception unit, and a parallelization factor to recommend a parallel execution scenario, allowing for efficient execution across multiple computer units to minimize exception recurrence.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If computer tasks are executed under time constraints, then productivity is improved, but reliability deteriorates due to hardware exceptions and delays

Engineering Contradiction:
Improvetask execution speedVSAvoidoperation reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs preliminary identification of hardware exception sources and determines exception units before task execution. By pre-analyzing potential exception sources and establishing parallelization factors in advance, the system prepares mitigation strategies proactively, allowing tasks to be executed under time constraints while maintaining reliability through pre-planned exception handling.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system segments the computer task into multiple parallel execution scenarios based on identified exception units and parallelization factors. By dividing the task into independent parallel segments that can be executed simultaneously on different computer units, the system achieves both improved productivity through parallel processing and enhanced reliability by isolating potential exception impacts to specific segments.

Inventive Principle:
Principle #1Segmentation

2Reliability

If hardware exceptions are monitored and mitigated, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveexception handling reliabilityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system implements self-service exception handling by automatically identifying hardware exception sources, determining exception units, and generating parallel execution scenarios without requiring external intervention. The system monitors itself for exceptions and autonomously adjusts execution strategies, improving reliability while minimizing the complexity burden on external control systems.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system changes execution parameters dynamically by determining parallelization factors based on identified exception units. Instead of adding complex hardware exception handling mechanisms, the system adjusts software execution parameters such as parallelization degree and task distribution to mitigate exceptions, achieving improved reliability through parameter optimization rather than structural complexity.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If parallel execution scenarios are implemented, then productivity is improved, but difficulty of detecting and measuring increases

Engineering Contradiction:
Improveparallel processing efficiencyVSAvoidexception tracking difficulty
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The system introduces an intermediary exception analysis component that bridges the gap between parallel execution scenarios and exception detection. This intermediary layer correlates hardware exceptions with specific parallel execution units and tracks exception propagation across parallel segments, enabling effective monitoring and measurement of exceptions in parallel environments without compromising productivity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10353766B2Managing execution of computer tasks under time constraints
Publication Date: 2019.07.16 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10353766B2 patent drawing
  • US10353766B2 patent drawing
  • US10353766B2 patent drawing

AI summary

A computer-implemented method comprises identifying a computer task; determining a hardware exception source associated with the computer task; determining an exception unit associated with the hardware exception source; determining a parallelization factor associated with the hardware exception source; and determining a parallel execution scenario associated with the computer task based on the exception unit and the parallelization factor. A corresponding computer program product and computer system are also disclosed.