Parallel FEC Interleaving for Low-Delay Data Transmission
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current data transmission methods in high-speed networks face challenges with bit error correction due to high signal loss and intersymbol interference, particularly in Ethernet interfaces, where the traditional interleaving method of writing by row and reading by column introduces delays and reduces the effectiveness of FEC units.
Innovation Solution
A method involving multiple forward error correction (FEC) units, where data streams are interleaved and de-interleaved to distribute bit errors across different FEC units, reducing the burden on individual units and improving error correction success rates without the need for complex row-column interleaving.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional row-column interleaving is used to distribute bit errors, then error correction capability is improved, but transmission delay increases
Solution Approach 1:
The patent segments the data stream into multiple parallel sub-streams, each processed by separate FEC units. This segmentation allows error distribution without requiring complex row-column interleaving, thereby reducing transmission delay while maintaining error correction capability through parallel processing of divided data portions.
2Reliability
If traditional row-column interleaving is used to distribute bit errors, then error correction capability is improved, but device complexity increases
Solution Approach 1:
The patent divides the data stream into multiple parallel sub-streams that can be independently processed by separate FEC units. This segmentation eliminates the need for complex row-column interleaving operations, reducing device complexity while achieving error distribution through simpler parallel processing architecture.
Solution Approach 2:
The patent performs preliminary distribution of data to multiple FEC units before transmission, rather than using complex interleaving after encoding. This preliminary action simplifies the overall system architecture by distributing error exposure across multiple independent units upfront, avoiding the need for sophisticated interleaving mechanisms.
3Reliability
If traditional row-column interleaving is used to distribute bit errors, then error correction effectiveness is improved, but power consumption increases
Solution Approach 1:
The patent segments data into parallel sub-streams processed by multiple FEC units, achieving error distribution without the computationally intensive row-column interleaving operations. This segmentation approach reduces power consumption by eliminating complex memory access patterns and computational operations while maintaining error correction effectiveness through parallel processing.
Data Source
AI summary
An embodiment of the present disclosure contemplates a data sending and receiving method and apparatus. A first FEC unit of a sending device sends, by using a first channel, a first data stream on which first FEC encoding has been performed; a second FEC unit of the sending device sends, by using a second channel, a second data stream on which second FEC encoding has been performed; and the sending device performs interleaving on the first data stream and the second data stream, to obtain an output data stream, and sends the output data stream to a receiving device.