Parallel FEC Stream Interleaving for Delay-Free Error Correction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current data transmission methods in high-speed networks face challenges with bit error correction due to high frequency signal loss and intersymbol interference, particularly with the existing interleaving methods that introduce delays and reduce the effectiveness of FEC units.

Innovation Solution

Implementing a method that uses multiple FEC units for encoding and decoding, with interleaving performed on data streams to distribute bit errors across different FEC units, eliminating the need for row-writing and column-reading interleaving, thus reducing delays and enhancing error correction capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional row-writing and column-reading interleaving is used, then bit error distribution is improved, but transmission delay increases

Engineering Contradiction:
Improvebit error correctionVSAvoidtransmission delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the data stream into multiple parallel sub-streams, each processed by separate FEC units. This segmentation allows simultaneous processing of multiple data portions without sequential interleaving operations, thereby maintaining error distribution benefits while eliminating the time delay associated with traditional row-column interleaving methods.

Inventive Principle:
Principle #1Segmentation

2Reliability

If traditional interleaving is used, then error correction effectiveness is improved, but system complexity increases

Engineering Contradiction:
Improveerror correctionVSAvoidinterleaving mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the data stream into multiple parallel sub-streams that can be independently processed by separate FEC units. This eliminates the need for complex row-writing and column-reading interleaving mechanisms, significantly reducing system complexity while maintaining effective error correction through parallel processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary distribution of data to multiple FEC units before transmission, allowing each unit to independently encode its portion. This preliminary action eliminates the need for post-transmission interleaving operations, reducing both device complexity and transmission delay while maintaining error correction effectiveness.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10291358B2Data receiving method and device, and data sending method and device
Publication Date: 2019.05.14 HUAWEI TECH CO LTD
  • US10291358B2 patent drawing
  • US10291358B2 patent drawing
  • US10291358B2 patent drawing

AI summary

An embodiment of the present invention discloses a data sending and receiving method. A first FEC unit of a sending device sends, by using a first channel, a first data stream on which first FEC encoding has been performed; a second FEC unit of the sending device sends, by using a second channel, a second data stream on which second FEC encoding has been performed; and the sending device performs interleaving on the first data stream and the second data stream, to obtain an output data stream, and sends the output data stream to a receiving device and error correction capability of a receiving device could be improved. In addition, in the present invention, an operation of writing by row and reading by column does not need to be performed. Therefore, no delay is generated.