Parallel Fetch Block Processing for Data Integrity
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Solution Overview
Problem
Data processing systems face security vulnerabilities when data is subjected to malicious interventions, such as clock or power glitches, between processing operations, leading to compromised integrity and security.
Innovation Solution
Implementing a data processing apparatus with fetch and processing circuitry that breaks data into blocks and performs at least partially temporally overlapping cryptographic hash and message authentication code processing, ensuring integrity verification and re-signature operations are conducted in parallel, synchronizing the processing pipelines to maintain lock-step operation and resist tampering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If data is processed sequentially through multiple operations with gaps between them, then system complexity is reduced and ease of operation is improved, but security reliability deteriorates due to vulnerability to malicious interventions during the gaps
Solution Approach 1:
The patent applies preliminary action by performing the first processing operation and immediately generating its result before any potential malicious intervention can occur. The result of the first operation is captured and used as input to the second operation, eliminating the vulnerable gap between operations where tampering could occur. This ensures that even if intervention occurs between operations, the integrity of the data flow is maintained through the pre-captured result.
2Productivity
If multiple processing operations are performed in parallel with temporal overlap, then productivity is improved and processing speed increases, but device complexity increases due to synchronization requirements
Solution Approach 1:
The patent segments the processing operations into distinct processing pipelines, each handling specific operations independently. By dividing the processing into separate pipelines that operate in parallel on different data blocks or different stages of processing, the system achieves improved productivity while managing complexity through modular organization. Each pipeline can be independently optimized and synchronized through well-defined interfaces.
Solution Approach 2:
The patent introduces intermediary structures such as buffers and synchronization mechanisms that mediate between parallel processing pipelines. These intermediaries manage the temporal overlap and data flow between pipelines, allowing multiple operations to proceed concurrently while maintaining data integrity and synchronization. The intermediary components handle the coordination overhead, isolating the complexity from the core processing logic.
3Device complexity
If sequential processing with gaps between operations is used, then device complexity is reduced, but vulnerability to harmful factors increases during the intervals between operations
Solution Approach 1:
The patent ensures continuity of useful action by maintaining active processing pipelines that continuously process data blocks without idle gaps. Even when one pipeline completes its operation, another pipeline is already processing subsequent data blocks or preparing the next operation. This continuous processing eliminates the vulnerable intervals between operations where malicious interventions such as clock glitches or power glitches could affect the system, while the overlapping execution maintains simplicity through straightforward pipeline architecture.
Data Source
AI summary
A data processing system comprises fetch circuitry to fetch data as a sequence of blocks of data from a memory. Processing circuitry comprising a plurality of processing pipelines performs at least partially temporally overlapping processing by at least two processes so as to produce respective results for the combined sequence of blocks, i.e. the processing of the data is performed on a block-by-block process at least partially in parallel by the two processing pipelines. The processes performed may comprise a cryptographic hash processing operation performing verification of the data file and a AES MAC process serving to re-signature the data file.