Parallel FIR Sampling Rate Conversion With Shared Coefficients
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional sampling rate converters face challenges in implementing high sampling rates efficiently, require large circuit sizes for parallel conversion, and are costly due to the need for multiple FIR calculation units and increased circuit size, especially with the spread of video and audio services that demand dynamic network quality changes.
Innovation Solution
A sampling rate converter that calculates position coordinate differences and uses a finite impulse response low pass filter (FIR-LPF) with a position coordinate of the impulse input set to z=0, allowing for parallel conversion of multiple sampling rates using a single FIR calculator and reducing circuit size by sharing FIR coefficients and input digital signals across different output sampling rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a high sampling rate R3 (least common multiple of R1 and R2) is used to generate samples for both input and output sampling rates, then both input and output samples can be generated simultaneously, but the converter becomes expensive and difficult to implement with semiconductor technology
Solution Approach 1:
The patent segments the sampling rate conversion process into two separate stages: first converting from input sampling rate R1 to an intermediate sampling rate R3, then converting from R3 to output sampling rate R2. This segmentation avoids the need to simultaneously support multiple sampling rates at one high frequency, thereby reducing circuit complexity while maintaining the ability to generate both input and output samples through sequential processing
Solution Approach 2:
The patent introduces an intermediate sampling rate R3 as a mediator between the input sampling rate R1 and output sampling rate R2. This intermediate rate serves as a bridge that allows conversion between different sampling rates without requiring the system to directly handle the least common multiple of R1 and R2, thus reducing the required sampling rate and circuit complexity
2Adaptability or versatility
If multiple FIR calculation units are mounted in parallel to support multiple sampling rates, then parallel conversion to multiple sampling rates is achieved, but circuit size increases considerably
Solution Approach 1:
The patent designs a single FIR calculation unit that can be configured to perform sampling rate conversion for multiple different sampling rate pairs (R1 to R2, R1 to R3, R3 to R2, etc.). By making the FIR calculator universal and reconfigurable, the system achieves parallel conversion capability for multiple sampling rates without requiring separate dedicated FIR units for each conversion pair, thus maintaining versatility while reducing circuit size
Solution Approach 2:
The patent merges multiple sampling rate conversion functions into a single shared FIR calculation unit. Instead of having separate parallel FIR calculators for each sampling rate conversion path, the system combines these functions into one unit that can be dynamically configured to perform different conversions, thereby reducing the overall circuit size while maintaining the ability to handle multiple sampling rate conversions
3Ease of manufacture
If the impulse response of the FIR-LPF is extended to a finite length for practical computation, then computation becomes feasible, but the accuracy of interpolation values decreases
Solution Approach 1:
The patent optimizes the parameters of the FIR low-pass filter, specifically the impulse response length and tap coefficients, to achieve the best balance between computation feasibility and interpolation accuracy. By carefully selecting and tuning these parameters, the system maintains practical computability with finite resources while maximizing the accuracy of the generated interpolation values
Data Source
AI summary
A position coordinate difference computing unit (5a to 5c) calculates position coordinate differences between position coordinates of the output digital signals and position coordinates of the input digital signals adjacent to the position coordinates. An FIR coefficient memory (13a to 13c) stores FIR coefficients of an FIR-LPF and outputs FIR coefficients corresponding to position coordinate differences between a fixed number of the output digital signals adjacent to the position coordinates of the output digital signals and the output digital signals. A control unit (11) supplies a group of the FIR coefficients and a group of the input digital signals corresponding to the respective position coordinate differences to the parallel FIR calculator (4) in predetermined order when the position coordinate differences corresponding to two or more different output digital signals are concurrently computed. The parallel FIR calculator (4) performs an FIR-LPF interpolating calculation by using those to obtain the output digital signals.