Parallel Flaw Scan for Hard Disk Drive Manufacturing

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Solution Overview

Problem

Current hard disk drive manufacturing is hindered by lengthy flaw scan procedures, which account for over 50% of manufacturing time due to the need to scan multiple tracks on a disk surface, necessitating a reduction in scan time to lower costs.

Innovation Solution

Implementing a method for parallel flaw scans using multiple read sensors, analog front ends, and independent timing loops to simultaneously read and process signals from multiple tracks, thereby reducing the total flaw scan time by approximately 50% compared to single sensor systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If a single read sensor is used to scan tracks sequentially, then the system complexity is low, but the flaw scan time is excessively long (over 50% of manufacturing time)

Engineering Contradiction:
Improveflaw scan timeVSAvoidsensor system complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent divides the single scanning task into multiple parallel scanning operations by using multiple read sensors (e.g., two read sensors reading two different tracks simultaneously). Each sensor independently scans a portion of the disk surface, reducing the total scan time while distributing the workload across multiple channels with independent timing loops

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from sequential scanning (one track at a time) to parallel scanning by adding the dimension of multiple simultaneous operations. Multiple read sensors operate on different tracks at the same time, effectively utilizing the temporal dimension to reduce overall processing time while maintaining system manageability through independent timing control

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If multiple read sensors operate simultaneously on different tracks, then the throughput increases, but the synchronization and timing control becomes more complex

Engineering Contradiction:
Improveflaw scan throughputVSAvoidtiming loop complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The timing control system is segmented into multiple independent timing loops, with each timing loop dedicated to controlling a specific read sensor and its corresponding track. This segmentation allows each timing loop to operate autonomously without interfering with others, simplifying the overall synchronization complexity while maintaining high throughput

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each timing loop is designed as a universal, self-contained control unit that can independently manage its assigned read sensor's positioning, data reading, and flaw detection. This modular universal design allows the system to scale to multiple sensors while keeping each control unit's complexity manageable and interchangeable

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If parallel scanning with multiple sensors is implemented, then the manufacturing efficiency improves, but the cost of additional hardware increases

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidnumber of read sensors
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent implements parallel scanning with a moderate number of read sensors (e.g., two sensors) rather than using a large array. This partial parallelization achieves significant throughput improvement (reducing scan time by approximately 50%) while keeping the hardware investment and system complexity at manageable levels, avoiding the need for excessive sensors

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8879186B1Fast flaw scan for multiple sensor systems
Publication Date: 2014.11.04 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8879186B1 patent drawing
  • US8879186B1 patent drawing
  • US8879186B1 patent drawing

AI summary

A method for performing parallel flaw scans of a plurality of tracks of a storage device. The storage device includes at least one disk, at least two read sensors, at least two analog front ends, and at least two independent timing loops. Each disk includes at least one surface, wherein each surface includes a plurality of tracks. The method includes writing flaw patterns to tracks of one or more surfaces of one or more disks. The method also includes positioning a first read sensor to read a first track. The method further includes positioning a second read sensor to read a second track. The method additionally includes simultaneously reading signals from the first track and the second track. The method also includes simultaneously performing flaw scans on read back signals from the first track and the second track. The method further includes outputting flaw scan results.