Parallel Frequency Multiplier Circuit for Harmonic Suppression

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Solution Overview

Problem

Existing frequency multiplication methods result in low harmonic suppression ratios due to the output of unwanted frequency signals, such as initial, tripled, and quadrupled signals, leading to impure frequency multiplication signals.

Innovation Solution

A method and device utilizing a parallel circuit with a frequency multiplier and a phase adjustment module, where the second circuit's phase is adjusted to be more than 90 degrees out of phase with the first circuit, counteracting interference signals to improve harmonic suppression.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If an initial signal is directly input into a frequency doubler, then a frequency doubled signal is output, but the frequency doubler also outputs the initial signal, a frequency tripled signal, a frequency quadrupled signal, and the like, resulting in a low harmonic suppression ratio

Engineering Contradiction:
Improvefrequency multiplication efficiencyVSAvoidharmonic suppression ratio
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent divides the frequency multiplication process into multiple parallel circuits, each handling different frequency components. The first circuit processes the fundamental frequency while the second circuit processes the third harmonic, allowing separate optimization and suppression of unwanted harmonics in each path.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent converts the harmful third harmonic signal into a beneficial component by deliberately generating it in the second circuit and combining it with the first circuit output. The third harmonic generated in the second circuit is used to suppress unwanted harmonics when combined with the first circuit signal, turning a harmful byproduct into a useful suppression mechanism.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Object-generated harmful factors

If a parallel circuit with phase adjustment is used to improve harmonic suppression, then spectral purity is improved, but the circuit complexity increases

Engineering Contradiction:
Improvespectral purityVSAvoidcircuit structure
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent changes the phase parameter of signals in the parallel circuits to achieve harmonic suppression. By adjusting the phase relationship between the first and second circuits (specifically setting the phase difference to suppress third harmonics), the system improves spectral purity without requiring complex filtering components.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent makes the frequency multiplier circuit perform multiple functions: it generates the desired frequency multiplication output while simultaneously using its own harmonic byproducts for suppression of unwanted signals. The second circuit serves both to generate third harmonics for suppression and to provide phase-adjusted signals for combining with the first circuit.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method achieves improved spectral purity and harmonic suppression ratios by effectively canceling out interference signals, resulting in a purer frequency multiplication signal.

Implementation Method 1

the phase adjustment module is configured to adjust a phase of the second circuit to a target phase, and a phase difference between the target phase and a first phase of the first circuit is more than 90 degrees

Methodology Applied
Scientific EffectPhase difference:

Implementation Method 2

the phase adjustment module can counteract interference signals output from the frequency multiplier in the first circuit

Methodology Applied
Scientific EffectInterference: Interference

Data Source

PatentUS12425009B2Method and device for outputting frequency multiplication signal having high harmonic suppression, and storage medium
Publication Date: 2025.09.23 SANECHIPS TECH CO LTD
  • US12425009B2 patent drawing
  • US12425009B2 patent drawing
  • US12425009B2 patent drawing

AI summary

A method and device for outputting frequency multiplication signal having high harmonic suppression, and a storage medium. The method includes: obtaining initial signal; inputting the initial signal into target circuit, where the target circuit includes parallel circuit, first circuit of the parallel circuit is provided with frequency multiplier, second circuit of the parallel circuit is provided with phase adjustment module, the first circuit is connected to input end and output ends of the target circuit, the second circuit is disconnected from the input end and the output end, the phase adjustment module is configured to adjust a phase of the second circuit to a target phase, and phase difference between the target phase and a first phase of the first circuit is greater than 90 degrees; taking a target signal output from the target circuit as frequency multiplication signal of the initial signal.