Parallel Finite State Machine Processing via Stream Segmentation

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Solution Overview

Problem

Processing large digitized electrical signals with finite state machines is inefficient due to long processing times, which is exacerbated by the need for single-processor processing, even with the availability of multi-processor computers and graphic cards.

Innovation Solution

Divide the input stream into sections and assign each section to a different processor, allowing processors to operate in parallel to determine the sequence of states and outputs, using a state vector transition map to reduce processing time by making two passes through each section.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If multiple processors are used to process the input stream, then processing time is reduced, but the complexity of coordinating processors and ensuring correct state transitions increases

Engineering Contradiction:
Improveprocessing timeVSAvoidprocessor coordination complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The input stream is divided into multiple sections, with each section assigned to a different processor. This segmentation allows parallel processing while maintaining manageable complexity for each processor, as each handles only its assigned section independently before passing results to the next processor.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

End states serve as intermediaries between processors. Each processor determines end states for its section and passes them to subsequent processors, which use these end states as starting points for their processing. This intermediary mechanism enables correct state transitions across processor boundaries without requiring complex direct coordination between all processors.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If the input stream is processed sequentially by a single processor, then processor coordination is simple, but processing time becomes unacceptably long for large input streams

Engineering Contradiction:
Improveprocessor coordination complexityVSAvoidprocessing time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The input stream is divided into multiple sections that can be processed simultaneously by different processors. This segmentation transforms the sequential processing bottleneck into parallel processing opportunities, reducing overall processing time while keeping each processor's task manageable through clear section assignments.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each processor pre-determines all end states for its assigned section before passing them to the next processor. This preliminary action ensures that subsequent processors have all necessary state information available upfront, enabling efficient parallel processing without requiring complex runtime coordination or back-and-forth communication.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8666925B1Method for parallel computation of a finite state machine
Publication Date: 2014.03.04 KEYSIGHT TECHNOLOGIES INC
  • US8666925B1 patent drawing
  • US8666925B1 patent drawing
  • US8666925B1 patent drawing

AI summary

A method for operating a plurality of processor to determine a sequence of states traversed by a finite state machine in processing an input stream that includes a plurality of characters. The method divides the input stream into a plurality of contiguous sections characterized by a beginning character and an end character. Each section is assigned to a different processor. Each processor determines an end state that the finite state machine would traverse after the end character in the section assigned to that processor has been processed. That end state is provided to a processor that did not process the section associated with that end state. Each processor determines a sequence of states that the finite state machine would traverse if the finite state machine processed the section assigned to that processor using one of said received end states.