Parallel Power Transistor Gate Driving for Light-Load Loss Reduction

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Solution Overview

Problem

Switching elements with multiple parallel-connected power transistors experience increased driving loss and reduced efficiency under light load conditions due to uniform driving voltage application, leading to high conduction and switching losses.

Innovation Solution

The power transistors are divided into units, with adjustable or fixed driving voltages, and controlled by independent drivers to reduce driving loss under light load states, utilizing detection circuits and regulation circuits to adjust driving voltages based on load conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If multiple power transistors are driven with the same driving voltage, then control is simplified, but driving loss increases under light load conditions

Engineering Contradiction:
Improvecontrol complexityVSAvoiddriving loss
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The control circuit is segmented into different control paths for first and second power transistors. The first control circuit generates reduced driving voltage for the first power transistors under light load conditions, while the second control circuit generates normal driving voltage for the second power transistors. This segmentation enables differentiated control strategies without overwhelming complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The driving voltage for the first power transistors is made dynamic and adjustable based on load conditions. The control circuit automatically adjusts the driving voltage level - using reduced voltage under light load conditions to minimize driving loss, and switching to normal voltage levels when higher switching capability is required. This dynamic adjustment optimizes efficiency across varying operating conditions.

Inventive Principle:
Principle #15Dynamics

2Loss of energy

If driving voltage is reduced under light load conditions, then driving loss is reduced, but switching capability may be compromised

Engineering Contradiction:
Improvedriving lossVSAvoidswitching capability
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent segments the power transistor groups into first and second categories with different driving voltage characteristics. The second power transistors maintain normal driving voltage levels to ensure reliable switching capability when needed, while the first power transistors use reduced driving voltage under light load conditions. This segmentation ensures that switching capability is preserved in the second group while driving loss is reduced in the first group.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the driving voltage parameter dynamically based on load conditions and transistor group. For the first power transistors, the driving voltage parameter is adjusted to a reduced level under light load conditions to minimize driving loss. For the second power transistors, the driving voltage parameter is maintained at normal levels to ensure sufficient switching capability. This parameter differentiation resolves the contradiction between driving loss reduction and switching capability maintenance.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12484132B2Driving circuit and driving method for switching element
Publication Date: 2025.11.25 SILERGY SEMICON TECH (HANGZHOU) CO LTD
  • US12484132B2 patent drawing
  • US12484132B2 patent drawing
  • US12484132B2 patent drawing

AI summary

A method of driving a switching element in a switching circuit, where the switching element comprises a plurality of power transistors coupled in parallel, can include: determining a state of a load in the switching circuit; decreasing a driving voltage of at least one power transistor in order to reduce driving loss of the switching element when a load is in a first load state; and maintaining driving voltages of the plurality of power transistors at a first threshold when the load is in a second load state.