Parallel Hardware CRC Engines for Multi-Protocol Safety Networks
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Solution Overview
Problem
In automotive safety networks, generating cyclic redundancy checks (CRCs) for data integrity across various communication protocols is computationally costly and time-consuming due to sequential processing and differing standards, especially when devices use different protocols like Bluetooth, Wi-Fi, and Ethernet.
Innovation Solution
Implementing multiple hardware-based stream-wise CRC engines in a copy engine to generate CRC values in parallel for datasets, with software-based ring descriptors offloading CRC overhead, allowing for simultaneous processing of multiple CRC types across different communication protocols.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If sequential processing is used to generate CRC values for different communication protocols, then device complexity is reduced, but processing time increases significantly
Solution Approach 1:
The system divides the CRC generation function into multiple independent hardware engines (first stream-wise CRC engine, second stream-wise CRC engine), each capable of handling different communication protocols simultaneously. This segmentation allows parallel processing of CRC values for datasets from different protocols without requiring a single complex sequential processor.
Solution Approach 2:
The patent transitions from sequential time-based processing to parallel spatial processing by implementing multiple CRC engines that operate simultaneously on different data streams. This dimensional shift from one-dimensional sequential execution to multi-dimensional parallel execution resolves the time complexity issue.
2Productivity
If multiple CRC engines are implemented in hardware, then processing speed improves through parallelization, but device complexity increases
Solution Approach 1:
Each stream-wise CRC engine is designed as a universal module capable of handling multiple communication protocols (Bluetooth, Wi-Fi, Ethernet, etc.). This multi-functionality reduces the need for protocol-specific dedicated hardware, thereby limiting the increase in overall device complexity while maintaining high parallel processing capability.
Solution Approach 2:
The system creates hardware copies of the CRC engine module for different protocol streams. Instead of designing entirely separate processing paths for each protocol, the patent uses replicated instances of a standardized CRC engine, which simplifies the overall hardware architecture while enabling parallel operation.
3Reliability
If CRC overhead is included in data payloads, then data integrity verification is simplified, but transmission efficiency decreases
Solution Approach 1:
The patent extracts the CRC overhead from the data payloads and handles it separately through dedicated hardware engines. By separating the CRC computation from the main data stream, the system maintains data integrity verification capability while preventing CRC-related processing from bottlenecking the overall data transfer efficiency.
Solution Approach 2:
The stream-wise CRC engines act as intermediary components that handle CRC computation independently from the main data transmission path. This intermediary approach allows CRC verification to proceed in parallel without interfering with the primary data flow, thus maintaining both reliability and efficiency.
Data Source
AI summary
Embodiments include methods performed by a copy engine of a computing device for generating a cyclic redundancy check (CRC) in a safety network, including copying a first dataset received from an interface bus to obtain a first dataset copy, copying a second dataset received from the interface bus to obtain a second dataset copy, generating, via a first stream-wise CRC engine in the hardware of the copy engine, a first CRC value for the first dataset copy and, in parallel, generating, via a second stream-wise CRC engine in the hardware of the copy engine, a second CRC value for the second dataset copy, transmitting, to a processor of the computing device, a first stream-wise CRC message including the first dataset copy and the first CRC value, and a second stream-wise CRC message including the second dataset copy and the second CRC value.